Abstract: A magnetoresistive memory device comprises magnetoresistive cells, each cell comprising a free magnetic layer and a fixed magnetic layer. The device furthermore comprises a bit line for each magnetoresistive cell and digit lines. Each digit line is common to a number of magnetoresistive cells and is positioned in a direction perpendicular to the bitlines. The magnetic layers are positioned in between the bitlines and the digit lines, but in a reversal of the usual layout according to the prior art, i.e. the digit line is positioned closer to the fixed magnetic layer than to the free magnetic layer. This enables a reduction in total write current where the write current in the line nearer the magnetic layer can be less than the current in a line spaced further away. Since there are more bit lines than digit lines activated, the total of the bit currents and the digit current can be reduced. Reduced total write current is useful in mobile battery powered applications to maximize battery life.