Abstract: A system, a circuit, and a method of wireless power transfer using a transmitter and a controller coupled to the transmitter. The controller is configured to perform operations including causing the transmitter to scan a frequency range that includes a maximum frequency and a minimum frequency. The operations further include determining one or more detections based at least on the scan of the frequency range. The detection may include a presence of one or more receivers, an absence of one or more receivers, and/or a presence of a foreign object. The operations include determining one or more further operations based on the one or more detections.

Abstract: A wireless power enabled apparatus includes a wireless power receiver. The wireless power receiver includes one or more receive coils configured to generate an AC power signal responsive to a wireless power signal. The wireless power receiver also includes two or more inductors configured with tightly coupled windings that share a common leakage inductance. Switching circuits are included such that each switching circuit is operably coupled to a corresponding one of the inductors. Control logic is configured to operate switches of the switching circuits such that each of the switching circuits and its corresponding two or more inductors are operated to shift between an energy storage mode for one or more phases of a switching period and an energy transfer mode for other phases of the switching period and the phases combine to comprise an entirety of the switching period.

Abstract: A system, a circuit, and a method of wireless power transfer using a transmitter and a controller coupled to the transmitter. The controller is configured to perform operations including causing the transmitter to scan a frequency range that includes a maximum frequency and a minimum frequency. The operations further include determining one or more detections based at least on the scan of the frequency range. The detection may include a presence of one or more receivers, an absence of one or more receivers, and/or a presence of a foreign object. The operations include determining one or more further operations based on the one or more detections.

Abstract: A wireless power enabled apparatus includes a wireless power receiver. The wireless power receiver includes one or more receive coils configured to generate an AC power signal responsive to a wireless power signal. The wireless power receiver also includes two or more inductors configured with tightly coupled windings that share a common leakage inductance. Switching circuits are included such that each switching circuit is operably coupled to a corresponding one of the inductors. Control logic is configured to operate switches of the switching circuits such that each of the switching circuits and its corresponding two or more inductors are operated to shift between an energy storage mode for one or more phases of a switching period and an energy transfer mode for other phases of the switching period and the phases combine to comprise an entirety of the switching period.

Abstract: A multi-phase voltage regulator is disclosed where each phase is comprised of an array of high and low side transistors that are integrated onto a single substrate. Further, a system of mounting the voltage regulator onto a flip chip and lead frame is disclosed wherein the source and drain lines form an interdigital pattern.

Abstract: The present invention discloses a smart driver used in flyback converters adopting a transconductance amplifier to turn on a synchronous rectifier FET, and a comparator to quickly turn off the synchronous rectifier FET.

Abstract: The present invention discloses a smart driver used in flyback converters adopting a transconductance amplifier to turn on a synchronous rectifier FET, and a comparator to quickly turn off the synchronous rectifier FET.

Abstract: A Hall effect current sensor system comprises a semiconductor die, a lead frame structure and a PCB board. The semiconductor die has Hall effect sensor fabricated on it. The lead frame structure comprises at least two extended electrical leads. A conductor bar is printed on the PCB board. The two extended electrical leads and the conductor bar form a closed current path for generating a direct magnetic field. When the Hall effect sensor is inside the closed loop of the current path, current information can be obtained.

Abstract: A digital current share bus interface connects to a power module which provides a signal representative of its output current, and adjusts the module's output current in response to a control signal received from the interface. A data formatting module receives the output current signal and generates a digital word that varies with the current; the bits of the word are coupled to a current share bus. A comparator module receives digital words conveyed via the bus and generated by the data formatting module at respective inputs, and provides the control signal to the power module so as to adjust its output current to match the current value represented by the digital word on the bus. In a typical implementation, multiple power modules are coupled to the current share bus via respective interfaces, with the output currents of all the power modules connected in parallel.

Abstract: A high-side current sense circuit comprises a sense resistance Rsense connected in series with a signal having an associated current to be measured I, which develops voltages V1 and V2 on either side of Rsense. A differential gain stage powered by supply voltages VCC and VEE produces an output voltage which varies with the difference between its input signals. To keep the common mode portion of the input signal between voltages VCC and VEE, a voltage modification circuit subtracts or adds a common mode voltage to or from V1 and V2 to produce modified voltages V1? and V2?, which are coupled to the gain stage inputs. The voltage modification circuit is arranged to ensure that VEE?V1? and V2??VCC.

Abstract: A digital controller for use with a full-bridge power converter which includes an isolation transformer that conducts first and second currents of opposite polarity during respective power-transfer phases. A current transformer senses the currents, and a non-zero current Iin is generated when either of the first or second currents is >0. The controller includes a sigma-delta modulator arranged to integrate a current applied to its input and to modulate the integrated signal to a bitstream. Iin is integrated by a first integrator and the bitstream is decimated to a digital word by a first decimation filter during the first power-transfer phase, and is integrated by a second integrator and decimated with a second decimation filter during the second phase. The difference between the digital values is used to adjust the pulses that operate the full-bridge switches as necessary to reduce any imbalance between the first and second currents.

Abstract: A method and system for providing sensorless brushless DC motor control using predictive switch timing requires connecting a stator coil in a bridge configuration, applying a positive excitation voltage across the coil for a predetermined time period, deactivating the excitation voltage, and monitoring the voltage (VEMF) generated due to electro-motive force (EMF) across the coil. The polarity of VEMF changes when the rotor has moved a known distance—typically 90°. After detecting a polarity change, a negative excitation voltage is applied across the coil, deactivated, and VEMF monitored to detect a polarity change. This sequence is repeated to maintain the rotation of the rotor. The motor is preferably set into motion using a start-up routine, which also determines the predetermined time period used during steady-state operation.

Abstract: A digital current share bus interface connects to a power module which provides a signal representative of its output current, and adjusts the module's output current in response to a control signal received from the interface. A data formatting module receives the output current signal and generates a digital word that varies with the current; the bits of the word are coupled to a current share bus. A comparator module receives digital words conveyed via the bus and generated by the data formatting module at respective inputs, and provides the control signal to the power module so as to adjust its output current to match the current value represented by the digital word on the bus. In a typical implementation, multiple power modules are coupled to the current share bus via respective interfaces, with the output currents of all the power modules connected in parallel.

Abstract: A high-side current sense circuit comprises a sense resistance Rsense connected in series with a signal having an associated current to be measured I, which develops voltages V1 and V2 on either side of Rsense. A differential gain stage powered by supply voltages VCC and VEE produces an output voltage which varies with the difference between its input signals. To keep the common mode portion of the input signal between voltages VCC and VEE, a voltage modification circuit subtracts or adds a common mode voltage to or from V1 and V2 to produce modified voltages V1? and V2?, which are coupled to the gain stage inputs. The voltage modification circuit is arranged to ensure that VEE?V1? and V2??VCC.

Abstract: A digital controller for use with a full-bridge power converter which includes an isolation transformer that conducts first and second currents of opposite polarity during respective power-transfer phases. A current transformer senses the currents, and a non-zero current Iin is generated when either of the first or second currents is >0. The controller includes a sigma-delta modulator arranged to integrate a current applied to its input and to modulate the integrated signal to a bitstream. Iin is integrated by a first integrator and the bitstream is decimated to a digital word by a first decimation filter during the first power-transfer phase, and is integrated by a second integrator and decimated with a second decimation filter during the second phase. The difference between the digital values is used to adjust the pulses that operate the full-bridge switches as necessary to reduce any imbalance between the first and second currents.

Abstract: A method and system for providing sensorless brushless DC motor control using predictive switch timing requires connecting a stator coil in a bridge configuration, applying a positive excitation voltage across the coil for a predetermined time period, deactivating the excitation voltage, and monitoring the voltage (VEMF) generated due to electro-motive force (EMF) across the coil. The polarity of VEMF changes when the rotor has moved a known distance—typically 90°. After detecting a polarity change, a negative excitation voltage is applied across the coil, deactivated, and VEMF monitored to detect a polarity change. This sequence is repeated to maintain the rotation of the rotor. The motor is preferably set into motion using a start-up routine, which also determines the predetermined time period used during steady-state operation.

Abstract: A multi-path digital power supply controller includes a first ADC (ADC1) coupled to the supply's output voltage Vout and arranged to provide an output which varies with Vout's low frequency components, and a second ADC (ADC2) coupled to Vout and arranged to provide an output which varies with Vout's high frequency components. A digital reference value is subtracted from the output of ADC1 to produce a low frequency digital error signal, and a summing circuit sums the low frequency digital error signal and the output of ADC2. Processing circuitry is arranged to produce an output which varies with the summed signal and is suitable for coupling to a power stage for use in regulating Vout. Preferably, ADC1 is a low-bandwidth high-resolution ADC and ADC2 is a high-bandwidth low-resolution ADC, both of which are low-cost components.

Abstract: An amplifier (AMP) is provided with a pair of choppers (CHPi,CHPo) in order to reduce the DC-offset and the noise produced by the amplifier (AMP). To obtain an optimal noise reduction the pair of choppers (CHPi,CHPo) operate on a high frequency. As a result the DC-offset cancellation is not optimal because a so-called charge injection of the switches in the pair of choppers (CHPi,CHPo) produces a DC-offset. To overcome this problem the amplifier (AMP) is further provided with further offset cancellation means which are for example formed by a further pair of choppers (CHPfi,CHPfo). This further pair of choppers (CHPfi,CHPfo) operates on a relatively low frequency. The combination of the pair of choppers (CHPi,CHPo) and the further pair of choppers (CHPfi,CHPfo) guarantees an optimal DC-offset cancellation as well as an optimal noise cancellation.

Abstract: Signal correction in a bipolar transistor circuit having a base-emitter voltage and a non-linear output signal corresponding to a detectable characteristic is improved by correcting non-linearity in the signal at third and/or higher-orders. According to an example embodiment of the present invention, the output of the transistor is corrected as a function of the base-emitter voltage, the non-linear output signal and a generated non-linearity. The generated non-linearity is adapted to cancel the non-linearity of the non-linear output signal when added thereto. Various implementations of the present invention are applicable to a variety of applications, each of which may have selected characteristics that are accounted for by the generated non-linearity, which is selectively adapted for each particular application. In this manner, third and higher-order corrections can be made, and the detection of characteristics such as data, temperature and other terms is improved.

Abstract: Signal correction in a bipolar transistor circuit having a base-emitter voltage and a non-linear output signal corresponding to a detectable characteristic is improved by correcting non-linearity in the signal at third and/or higher-orders. According to an example embodiment of the present invention, the output of the transistor is corrected as a function of the base-emitter voltage, the non-linear output signal and a generated non-linearity. The generated non-linearity is adapted to cancel the non-linearity of the non-linear output signal when added thereto. Various implementations of the present invention are applicable to a variety of applications, each of which may have selected characteristics that are accounted for by the generated non-linearity, which is selectively adapted for each particular application. In this manner, third and higher-order corrections can be made, and the detection of characteristics such as data, temperature and other terms is improved.