Patents by Inventor Anthony Ang

Anthony Ang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8049935
    Abstract: An optical scanning device is provided which comprises a laser array which emits laser beams including a number of beams (1, 2, . . . , n) writing a swath of rasters having a laser scanning section which, when an interlaced scanning period i, is set to a natural number between beams which are adjacent in a sub-scanning direction, scans the laser beams emitted from the laser array with the interlaced scanning period i. The laser scanning section can scan the laser beams such that the beam number n and the interlaced scanning period i are relatively prime natural numbers, and n>i. In a first scan, data for raster lines (1, 2, . . . , n) can be selectively associated with a respective first exposure. At a second scan, data for raster lines (i+1, i+2, . . . , n) can be selectively associated with a respective second exposure and data for raster lines (n+1, n+2, . . . , n+i) can be selectively associated with a respective first exposure. The first respective exposure for raster lines (i+1, i+2, . . .
    Type: Grant
    Filed: January 17, 2011
    Date of Patent: November 1, 2011
    Assignee: Xerox Corp.
    Inventors: Anthony Ang, Robert Paul Loce, Beilei Xu, Robert Kleckner
  • Publication number: 20110109947
    Abstract: An optical scanning device is provided which comprises a laser array which emits laser beams including a number of beams (1, 2, . . . , n) writing a swath of rasters having a laser scanning section which, when an interlaced scanning period i, is set to a natural number between beams which are adjacent in a sub-scanning direction, scans the laser beams emitted from the laser array with the interlaced scanning period i. The laser scanning section can scan the laser beams such that the beam number n and the interlaced scanning period i are relatively prime natural numbers, and n>i. In a first scan, data for raster lines (1, 2, . . . , n) can be selectively associated with a respective first exposure. At a second scan, data for raster lines (i+1, i+2, . . . , n) can be selectively associated with a respective second exposure and data for raster lines (n+1, n+2, . . . , n+i) can be selectively associated with a respective first exposure. The first respective exposure for raster lines (i+1, i+2, . . .
    Type: Application
    Filed: January 17, 2011
    Publication date: May 12, 2011
    Applicant: Xerox Corporation
    Inventors: ANTHONY ANG, ROBERT PAUL LOCE, BEILEI XU, ROBERT KLECKNER
  • Patent number: 7894107
    Abstract: An optical scanning device is provided which comprises a laser array which emits laser beams including a number of beams (1, 2, . . . , n) writing a swath of rasters having a laser scanning section which, when an interlaced scanning period i, is set to a natural number between beams which are adjacent in a sub-scanning direction, scans the laser beams emitted from the laser array with the interlaced scanning period i. The laser scanning section can scan the laser beams such that the beam number n and the interlaced scanning period i are relatively prime natural numbers, and n>i. In a first scan, data for raster lines (1, 2, . . . , n) can be selectively associated with a respective first exposure. At a second scan, data for raster lines (i+1, i+2, . . . , n) can be selectively associated with a respective second exposure and data for raster lines (n+1, n+2, . . . , n+i) can be selectively associated with a respective first exposure. The first respective exposure for raster lines (i+1, i+2, . . .
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: February 22, 2011
    Assignee: Xerox Corporation
    Inventors: Anthony Ang, Robert Paul Loce, Beilei Xu, Robert Kleckner
  • Publication number: 20080266619
    Abstract: An optical scanning device is provided which comprises a laser array which emits laser beams including a number of beams (1, 2, . . . , n) writing a swath of rasters having a laser scanning section which, when an interlaced scanning period i, is set to a natural number between beams which are adjacent in a sub-scanning direction, scans the laser beams emitted from the laser array with the interlaced scanning period i. The laser scanning section can scan the laser beams such that the beam number n and the interlaced scanning period i are relatively prime natural numbers, and n>i. In a first scan, data for raster lines (1, 2, . . . , n) can be selectively associated with a respective first exposure. At a second scan, data for raster lines (i+1, i+2, . . . n) can be selectively associated with a respective second exposure and data for raster lines (n+1, n+2, . . . , n+i) can be selectively associated with a respective first exposure. The first respective exposure for raster lines (i+1, i+2, . . .
    Type: Application
    Filed: April 27, 2007
    Publication date: October 30, 2008
    Inventors: Anthony Ang, Robert Paul Loce, Beilei Xu, Robert Kleckner
  • Publication number: 20060103718
    Abstract: A variable interlacing system for use in xerographic imaging. Variable interlacing provides automatic reconfiguration of imaging parameters in an electrostatic printing machine. Print speed, format and resolution of the printed material may be traded-off against each other dynamically and on demand without changing any of the hardware, including the Raster Output Scanner (ROS). The system and the method of use of the system involve multi-beam irradiative sources in the ROS.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventor: Anthony Ang
  • Patent number: 6509785
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: January 21, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Patent number: 6384675
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: May 7, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Publication number: 20020008565
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.
    Type: Application
    Filed: March 22, 2000
    Publication date: January 24, 2002
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Patent number: 6339542
    Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages are supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: January 15, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
  • Publication number: 20010028575
    Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages are supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.
    Type: Application
    Filed: June 6, 2001
    Publication date: October 11, 2001
    Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
  • Patent number: 6301146
    Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages arc supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: October 9, 2001
    Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
  • Patent number: 6198325
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines. The differencing, non-overlapped, dual-output amplifier includes a predriver stage and an output stage, both of which are connected to the first and second power supply input lines.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: March 6, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Patent number: 6104523
    Abstract: A dual infrared beam raster scanning system has overfilled facets on the rotating polygon mirror and a double pass through a two cylindrical lens element f-theta lens group. The raster scanning system has an aspheric collimator lens, an aperture and a four lens element cylindrical lens group in the pre-polygon optics, and a two cylindrical lens element f-theta lens group and a cylindrical wobble correction mirror in the post-polygon mirror optics.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: August 15, 2000
    Assignee: Xerox Corporation
    Inventor: Anthony Ang
  • Patent number: 6069521
    Abstract: An active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: May 30, 2000
    Assignee: Sun Microsystems
    Inventors: Alexander Dougald Taylor, Michael Anthony Ang
  • Patent number: 6057953
    Abstract: A dual infrared beam raster scanning system has overfilled facets on the rotating polygon mirror and a double pass through a two cylindrical lens element f-theta lens group. The raster scanning system has an aspheric collimator lens, an aperture and a four lens element cylindrical lens group in the pre-polygon optics, and a two cylindrical lens element f-theta lens group and a cylindrical mirror and a cylindrical wobble correction mirror in the post-polygon mirror optics.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: May 2, 2000
    Assignee: Xerox Corporation
    Inventor: Anthony Ang
  • Patent number: 6037833
    Abstract: A circuit includes a generator that supplies a signal that is directly proportional to the absolute temperature. No calibration or external reference components are necessary.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: March 14, 2000
    Assignee: Philips Electronics North America Corporation
    Inventor: Mike Anthony Ang
  • Patent number: 6028417
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: February 22, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Patent number: 5973547
    Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: October 26, 1999
    Assignee: Sun Microsystems, Inc
    Inventors: Michael Anthony Ang, Alexander Dougald Taylor
  • Patent number: 5946125
    Abstract: A three layer dielectric material coating of silicon dioxide/zinc selenide/silicon dioxide is deposited on the reflective surface of the facets of a rotating polygon mirror to provide a uniform intensity of a reflected beam over a wide range of angles of incidence and a wide range of beam wavelengths.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: August 31, 1999
    Assignee: Xerox Corporation
    Inventor: Anthony Ang
  • Patent number: 5914814
    Abstract: A telecentric laser beam optical focusing system consists of two diffractive optical elements. The optical system has a spot size of less than one micron and a Strehl ratio of over 0.9 with a f/number of one and a total object/image field of 0.5 micron.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: June 22, 1999
    Assignee: Xerox Corporation
    Inventor: Anthony Ang