Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed over and between the photoresist features, over the placeholder, and within said gap. The layer may be anisotropically etched into a plurality of first vertical structures along edges of the photoresist features, and into a second vertical structure along an edge of the placeholder. A mask may be formed over the second vertical structure. Subsequently, the first vertical structures may be used to pattern string gates while the mask is used to pattern a select gate. Some embodiments include methods of forming conductive runners, and some embodiments may include semiconductor constructions.

Abstract: The present invention relates to fabricating a reticle or mask for use in an extreme ultraviolet (“EUV”) photolithographic process. The EUV reticle comprises a substrate, a planarizing layer formed over a surface of the substrate, and a reflective layer deposited in contact with the planarizing layer. The planarizing layer comprises a material that has superior surface flatness properties and provides a flat surface upon which the reflective layer is deposited. The planarizing layer is spin-coated onto the substrate and comprises a material such as an anti-reflective material, a dielectric material, or a polymer. Since the reflective layer is deposited over the flat surface provided by the planarizing layer, the reflective layer is not compromised by defects in the surface of the substrate.

Abstract: The present invention relates to fabricating a reticle or mask for use in an extreme ultraviolet (“EUV”) photolithographic process. The EUV reticle comprises a substrate, a planarizing layer formed over a surface of the substrate, and a reflective layer deposited in contact with the planarizing layer. The planarizing layer comprises a material that has superior surface flatness properties and provides a flat surface upon which the reflective layer is deposited. The planarizing layer is spin-coated onto the substrate and comprises a material such as an anti-reflective material, a dielectric material, or a polymer. Since the reflective layer is deposited over the flat surface provided by the planarizing layer, the reflective layer is not compromised by defects in the surface of the substrate.

Abstract: The present invention relates to fabricating a reticle or mask for use in an extreme ultra-violet (“EUV”) photolithographic process. The EUV reticle comprises a substrate, a planarizing layer formed over a surface of the substrate, and a reflective layer deposited in contact with the planarizing layer. The planarizing layer comprises a material that has superior surface flatness properties and provides a flat surface upon which the reflective layer is deposited. The planarizing layer is spin-coated onto the substrate and comprises a material such as an anti-reflective material, a dielectric material, or a polymer. Since the reflective layer is deposited over the flat surface provided by the planarizing layer, the reflective layer is not compromised by defects in the surface of the substrate.

Abstract: Methods of forming layers of photoresist and apparatus for forming photoresist are described. In one embodiment, a wafer is provided and photoresist is applied thereover. The wafer is rotated while the photoresist is baked. In another embodiment, a wafer having photoresist formed thereover is positioned at a baking station. After positioning, the wafer is moved while exposed to baking conditions at the station. In another embodiment, a wafer having photoresist applied thereover is positioned on a rotatable hot plate at a photoresist baking station. The rotatable hot plate is rotated during at least some of the time the wafer is baked at the station. In another embodiment, photoresist is applied over a wafer surface and into a predefined non-uniform thickness over the surface. The non-uniform thickness is modified over the surface into a more uniform thickness while the photoresist is baked.