Abstract: An oscillating circuit (10) includes a quartz crystal oscillator (12) for generating a clock signal (20). The clock signal is synchronized to a master signal (19) during the lock-in periods when the oscillating circuit (10) has access to the master signal (19). During the holdover periods when the oscillating circuit (10) loses access to the master signal (19), an oscillation frequency function predicts the crystal oscillation frequency in terms the physical parameters, e.g., time and temperature, that may affect the crystal oscillation frequency. The predicted frequency is compared with a standard frequency to generate an error signal. In response to the error signal, a fraction handler block (28) determines whether adding cycles to or deleting cycles from the clock signal, thereby calibrating the oscillation signal (13) of the oscillating circuit (10).

Abstract: An oscillating circuit (10) includes a quartz crystal oscillator (12) for generating a clock signal (20). The clock signal is synchronized to a master signal (19) during the lock-in periods when the oscillating circuit (10) has access to the master signal (19). During the holdover periods when the oscillating circuit (10) loses access to the master signal (19), an oscillation frequency function predicts the crystal oscillation frequency in terms the physical parameters, e.g., time and temperature, that may affect the crystal oscillation frequency. The predicted frequency is compared with a standard frequency to generate an error signal. In response to the error signal, a fraction handler block (28) determines whether adding cycles to or deleting cycles from the clock signal, thereby calibrating the oscillation signal (13) of the oscillating circuit (10).