Abstract: An antenna package is disclosed. The antenna package includes a beam former circuit, a second die with an integrated circuit that may have power amplifier circuitry, and an antenna array. The antenna package is assembled into a multilayer substrate with the die on a first level with externally accessible contact points. The second die may be positioned within the substrate with no externally accessible contact points and be coupled to the first die, with vias having little or no lateral translation of signal paths on metal layers of the substrate. The antenna array may be positioned on a top layer opposite the first layer and thus be positioned to radiate effectively for signal transmission (or receive signal without obstruction from the package). The antenna array may likewise be coupled to the second die, with vias having little or no lateral translation of signal paths on metal layers of the substrate.

Abstract: The present disclosure relates to a rigid-core laminate that includes a core section formed of a first material with a first modulus of at least 50 GPa, a number of sacrificial sockets embedded in the core section through a potting material, a number of top dielectric layers formed over a top surface of the core section and covering a top surface of each sacrificial socket, a number of bottom dielectric layers formed underneath a bottom surface of the core section and covering a bottom surface of each sacrificial socket, and a number of tooling-holes. Herein, each sacrificial socket is formed of a second material with a second modulus that is smaller than the first modulus. Each tooling-hole extends vertically through the top dielectric layers, a corresponding sacrificial socket, and the bottom dielectric layers. No portion of the core section is exposed in any one of the tooling-holes.

Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.

Abstract: Systems and methods for top side cooling for a power amplifier module are disclosed. The power amplifier module may be part of a system in a package that may be considered inverted relative to a normal orientation. A power amplifier die (and other elements) may be mounted on a metallization layer. Wire bond connections may communicatively couple the “top” of the power amplifier die to the metallization layer. A plated heat sink (PHS) laminate may be positioned “beneath” the power amplifier die in the metallization layer. The metallization layer may communicatively couple to vias that extend “up” and “above” the power amplifier die to a connection pad. The entire package is then inverted such that the connection pads may couple to a printed circuit board in a downward direction, and the PHS is now facing upward so that it may be coupled to a heat sink.

Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.

Abstract: Machine learning-based techniques are described that enable modifying an event timing schedule in a multi-tenant computing environment. The multi-tenant computing environment stores tenant data of multiple tenants. Each tenant of the multiple tenants offers subscription services to subscribers. Multiple events involving multiple subscribers of a particular tenant are attempted. The multiple events include a first subset of successfully executed events and a second subset of unsuccessfully executed events. One or more training datasets are generated based on the first subset and the second subset. The one or more training datasets include contextual information corresponding to each of the multiple events. The contextual information includes multilevel data. A machine learning model is trained to output a timing schedule for retrying a particular unsuccessfully executed event of a particular subscriber.

Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.

Abstract: An integrated packaging device is provided. The integrated device includes a base layer, an insulating layer over and in contact with the base layer, and a conductive layer over and in contact with the insulating layer. The conductive layer includes a conductive pattern. The integrated device also includes an opening extending from the conductive layer to the base layer. The conductive pattern surrounds the opening.

Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.

Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.

Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 µm and 130 µm, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.

Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.

Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.

Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.

Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.

Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.

Abstract: System-in-package (SiP) devices are disclosed that include power amplifiers and controllers such as beamformer integrated circuits that are packaged together. Packaging and thermal management configurations are disclosed that allow a plurality of power amplifiers and a beamformer integrated circuit to operate efficiently while in close proximity to one another. SiP devices are disclosed that include heat spreaders that are incorporated within the SiP devices and exposed at top surfaces of the SiP devices to effectively dissipate heat. Heat spreaders may be provided as part of a lead frame that allows multiple SiP devices to be uniformly assembled with dimensions sized for high frequency applications, including millimeter wave operation.

Abstract: System-in-package (SiP) devices are disclosed that include power amplifiers and controllers such as beamformer integrated circuits that are packaged together. Packaging and thermal management configurations are disclosed that allow a plurality of power amplifiers and a beamformer integrated circuit to operate efficiently while in close proximity to one another. SiP devices are disclosed that include heat spreaders that are incorporated within the SiP devices and exposed at top surfaces of the SiP devices to effectively dissipate heat. Heat spreaders may be provided as part of a lead frame that allows multiple SiP devices to be uniformly assembled with dimensions sized for high frequency applications, including millimeter wave operation.

Abstract: The present disclosure relates to an air-cavity package, which includes a substrate, a base, and a semiconductor die. The substrate includes a substrate body, thermal vias extending through the substrate body, and a metal trace on a bottom side of the substrate body and separate from the thermal vias. The base includes a base body, a perimeter wall extending about a perimeter of the base body, and a signal via structure. Herein, the bottom side of the substrate body resides on the perimeter wall to form a cavity, and the signal via structure extends through the perimeter wall and is electrically coupled to the metal trace. The semiconductor die is mounted on the bottom side of the substrate body, exposed to the cavity, and electrically coupled to the metal trace. The thermal vias conduct heat generated from the semiconductor die toward a top side of the substrate body.

Abstract: Embodiments of the present disclosure describe a method of fabricating a multi-channel modulator driver with an enclosure. After a substrate is provided, components of a multi-channel modulator driver are attached to the substrate. Herein, the components include first components associated with a first channel and second components associated with a second channel. Next, an enclosure is attached to the substrate to cover the multi-channel modulator driver. The enclosure has a wall disposed between the first components and the second components, and a top region coupled with the wall. The enclosure and the wall are composed of an electrically conductive polymer. The wall includes a first portion that has the electrically conductive polymer covered by a metal film and a second portion that has the electrically conductive polymer not covered by the metal film.