Patents by Inventor Anthony Chiu

Anthony Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948893
    Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: April 2, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Zhunming Du, Christopher Sanabria, Timothy M. Gittemeier, Terry Hon, Anthony Chiu, Tariq Lodhi
  • Publication number: 20230298958
    Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 µm and 130 µm, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.
    Type: Application
    Filed: April 19, 2023
    Publication date: September 21, 2023
    Inventors: Anthony Chiu, Robert Charles Dry, Mihir Roy
  • Patent number: 11699629
    Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: July 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Anthony Chiu, Bror Peterson, Andrew Ketterson
  • Publication number: 20230197629
    Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Zhunming Du, Christopher Sanabria, Timothy M. Gittemeier, Terry Hon, Anthony Chiu, Tariq Lodhi
  • Patent number: 11637050
    Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 25, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Anthony Chiu, Robert Charles Dry, Mihir Roy
  • Publication number: 20220319945
    Abstract: The present disclosure relates to a package architecture and a method for making the same. The disclosed package architecture includes a package carrier, a first device die and a second device die mounted on the package carrier, and a heat spreader. The first device die includes a first device body with a thickness between 5 ?m and 130 ?m, a die carrier, and an attachment section between the first device body and the die carrier, while the second device die includes a second device body. The first device body and the second device body are formed of different materials. A top surface of the die carrier of the first device die and a top surface of the second device body of the second device die are substantially coplanar. The heat spreader resides over the top surface of the die carrier and the top surface of the second device body.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Anthony Chiu, Robert Charles Dry, Mihir Roy
  • Publication number: 20220310471
    Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Anthony Chiu, Bror Peterson, Andrew Ketterson
  • Patent number: 11303009
    Abstract: System-in-package (SiP) devices are disclosed that include power amplifiers and controllers such as beamformer integrated circuits that are packaged together. Packaging and thermal management configurations are disclosed that allow a plurality of power amplifiers and a beamformer integrated circuit to operate efficiently while in close proximity to one another. SiP devices are disclosed that include heat spreaders that are incorporated within the SiP devices and exposed at top surfaces of the SiP devices to effectively dissipate heat. Heat spreaders may be provided as part of a lead frame that allows multiple SiP devices to be uniformly assembled with dimensions sized for high frequency applications, including millimeter wave operation.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: April 12, 2022
    Assignee: QORVO US, INC.
    Inventors: Anthony Chiu, Bror Peterson, Michael Arnold
  • Publication number: 20210050650
    Abstract: System-in-package (SiP) devices are disclosed that include power amplifiers and controllers such as beamformer integrated circuits that are packaged together. Packaging and thermal management configurations are disclosed that allow a plurality of power amplifiers and a beamformer integrated circuit to operate efficiently while in close proximity to one another. SiP devices are disclosed that include heat spreaders that are incorporated within the SiP devices and exposed at top surfaces of the SiP devices to effectively dissipate heat. Heat spreaders may be provided as part of a lead frame that allows multiple SiP devices to be uniformly assembled with dimensions sized for high frequency applications, including millimeter wave operation.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 18, 2021
    Inventors: Anthony Chiu, Bror Peterson, Michael Arnold
  • Patent number: 10177064
    Abstract: The present disclosure relates to an air-cavity package, which includes a substrate, a base, and a semiconductor die. The substrate includes a substrate body, thermal vias extending through the substrate body, and a metal trace on a bottom side of the substrate body and separate from the thermal vias. The base includes a base body, a perimeter wall extending about a perimeter of the base body, and a signal via structure. Herein, the bottom side of the substrate body resides on the perimeter wall to form a cavity, and the signal via structure extends through the perimeter wall and is electrically coupled to the metal trace. The semiconductor die is mounted on the bottom side of the substrate body, exposed to the cavity, and electrically coupled to the metal trace. The thermal vias conduct heat generated from the semiconductor die toward a top side of the substrate body.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: January 8, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Kevin J. Anderson, Anthony Chiu, Tarak A. Railkar
  • Patent number: 9936587
    Abstract: Embodiments of the present disclosure describe a method of fabricating a multi-channel modulator driver with an enclosure. After a substrate is provided, components of a multi-channel modulator driver are attached to the substrate. Herein, the components include first components associated with a first channel and second components associated with a second channel. Next, an enclosure is attached to the substrate to cover the multi-channel modulator driver. The enclosure has a wall disposed between the first components and the second components, and a top region coupled with the wall. The enclosure and the wall are composed of an electrically conductive polymer. The wall includes a first portion that has the electrically conductive polymer covered by a metal film and a second portion that has the electrically conductive polymer not covered by the metal film.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: April 3, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Craig Steinbeiser, Khiem Dinh, Anthony Chiu
  • Publication number: 20180061730
    Abstract: The present disclosure relates to an air-cavity package, which includes a substrate, a base, and a semiconductor die. The substrate includes a substrate body, thermal vias extending through the substrate body, and a metal trace on a bottom side of the substrate body and separate from the thermal vias. The base includes a base body, a perimeter wall extending about a perimeter of the base body, and a signal via structure. Herein, the bottom side of the substrate body resides on the perimeter wall to form a cavity, and the signal via structure extends through the perimeter wall and is electrically coupled to the metal trace. The semiconductor die is mounted on the bottom side of the substrate body, exposed to the cavity, and electrically coupled to the metal trace. The thermal vias conduct heat generated from the semiconductor die toward a top side of the substrate body.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 1, 2018
    Inventors: Kevin J. Anderson, Anthony Chiu, Tarak A. Railkar
  • Patent number: 9899292
    Abstract: Top-side cooling of Radio Frequency (RF) products in air cavity packages is provided. According to one aspect, an air cavity package comprises a substrate, a RF component mounted to the substrate, and a lid structure comprising a first material and being mounted to the substrate that covers the RF component such that a cavity is formed within the lid structure and about the RF component. At least one opening is provided in a top portion of the lid. The air cavity package also comprises a heat transfer structure comprising a second material and comprising a heat path extending from the top surface of the substrate through the opening(s) in the lid to the top outer surface of the air cavity package to provide a top-side thermal interface. In one embodiment, the lid is comprised of a molded material that absorbs RF signals and the heat transfer structure is metal.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: February 20, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Anthony Chiu, Craig Steinbeiser, Oleh Krutko, John Beall
  • Publication number: 20170229368
    Abstract: Top-side cooling of Radio Frequency (RF) products in air cavity packages is provided. According to one aspect, an air cavity package comprises a substrate, a RF component mounted to the substrate, and a lid structure comprising a first material and being mounted to the substrate that covers the RF component such that a cavity is formed within the lid structure and about the RF component. At least one opening is provided in a top portion of the lid. The air cavity package also comprises a heat transfer structure comprising a second material and comprising a heat path extending from the top surface of the substrate through the opening(s) in the lid to the top outer surface of the air cavity package to provide a top-side thermal interface. In one embodiment, the lid is comprised of a molded material that absorbs RF signals and the heat transfer structure is metal.
    Type: Application
    Filed: August 9, 2016
    Publication date: August 10, 2017
    Inventors: Anthony Chiu, Craig Steinbeiser, Oleh Krutko, John Beall
  • Publication number: 20150334848
    Abstract: Embodiments of the present disclosure describe techniques and configurations for an enclosure that can be used for channel isolation in a multi-channel modulator driver such as, for example, an optical modulator driver. A system may include a substrate, a multi-channel modulator driver mounted on the substrate, and an enclosure mounted on the substrate to cover the multi-channel modulator driver, the enclosure having a wall that is disposed between first components of the multi-channel modulator driver associated with a first channel and second components of the multi-channel modulator driver associated with a second channel, the wall being composed of an electrically conductive material. Other embodiments may also be described and/or claimed.
    Type: Application
    Filed: July 28, 2015
    Publication date: November 19, 2015
    Inventors: Craig Steinbeiser, Khiem Dinh, Anthony Chiu
  • Patent number: 9113549
    Abstract: Embodiments of the present disclosure describe techniques and configurations for an enclosure that can be used for channel isolation in a multi-channel modulator driver such as, for example, an optical modulator driver. A system may include a substrate, a multi-channel modulator driver mounted on the substrate, and an enclosure mounted on the substrate to cover the multi-channel modulator driver, the enclosure having a wall that is disposed between first components of the multi-channel modulator driver associated with a first channel and second components of the multi-channel modulator driver associated with a second channel, the wall being composed of an electrically conductive material. Other embodiments may also be described and/or claimed.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: August 18, 2015
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Craig Steinbeiser, Khiem Dinh, Anthony Chiu
  • Publication number: 20130141883
    Abstract: Embodiments of the present disclosure describe techniques and configurations for an enclosure that can be used for channel isolation in a multi-channel modulator driver such as, for example, an optical modulator driver. A system may include a substrate, a multi-channel modulator driver mounted on the substrate, and an enclosure mounted on the substrate to cover the multi-channel modulator driver, the enclosure having a wall that is disposed between first components of the multi-channel modulator driver associated with a first channel and second components of the multi-channel modulator driver associated with a second channel, the wall being composed of an electrically conductive material. Other embodiments may also be described and/or claimed.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventors: Craig Steinbeiser, Khiem Dinh, Anthony Chiu
  • Patent number: 7958557
    Abstract: In certain embodiments, a method for tagging communications from a user system, such that a source of a malicious computer element in a computer network may be determined, includes determining tag information for a user system in the computer network, the tag information physically identifying the user system. The method further includes detecting an attempt to send a communication from the user system and, in response to detecting the attempt to send a communication from the user system, attaching the tag information to the communication prior to sending the communication from the user system. The attachment of the tag information to the communication allows the source of the communication to be determined in response to determining that the communication is associated with a malicious computer element, the source comprising the user system.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: June 7, 2011
    Assignee: Computer Associates Think, Inc.
    Inventor: Anthony Chiu-Chi Kwan
  • Publication number: 20080064208
    Abstract: A system and method is disclosed for increasing the strength of a bond made by a small diameter wire in ball bonding. In one embodiment of the invention a structure for receiving a ball bond comprises substrate material that has portions that form a substrate cavity and a wire bond pad that covers and fills the substrate cavity. The wire bond pad also has portions that form a wire bond cavity for receiving the ball bond. The ball is wirebonded to the sides and bottom of the wire bond cavity. The sides of the wire bond cavity provide additional strength to the bond to resist shear and tensile forces that may act on the wire.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 13, 2008
    Applicant: STMicroelectronics, Inc.
    Inventor: Anthony Chiu
  • Publication number: 20070271611
    Abstract: In certain embodiments, a method for tagging communications from a user system, such that a source of a malicious computer element in a computer network may be determined, includes determining tag information for a user system in the computer network, the tag information physically identifying the user system. The method further includes detecting an attempt to send a communication from the user system and, in response to detecting the attempt to send a communication from the user system, attaching the tag information to the communication prior to sending the communication from the user system. The attachment of the tag information to the communication allows the source of the communication to be determined in response to determining that the communication is associated with a malicious computer element, the source comprising the user system.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 22, 2007
    Inventor: Anthony Chiu-Chi Kwan