Patents by Inventor Anthony D. Gitchell

Anthony D. Gitchell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10826848
    Abstract: A system for dynamically configuring and scheduling input/output (I/O) workloads among processing cores is disclosed. Resources for an application that are related to each other and/or not multicore safe are grouped together into work nodes. When these need to be executed, the work nodes are added to a global queue that is accessible by all of the processing cores. Any processing core that becomes available can pull and process the next available work node through to completion, so that the work associated with that work node software object is all completed by the same core, without requiring additional protections for resources that are not multicore safe. Indexes track the location of both the next work node in the global queue for processing and the next location in the global queue for new work nodes to be added for subsequent processing.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: November 3, 2020
    Assignee: NETAPP, INC.
    Inventors: Charles E. Nichols, Scott Terrill, Don Humlicek, Arindam Banerjee, Yulu Diao, Anthony D. Gitchell
  • Publication number: 20180113738
    Abstract: A system for dynamically configuring and scheduling input/output (I/O) workloads among processing cores is disclosed. Resources for an application that are related to each other and/or not multicore safe are grouped together into work nodes. When these need to be executed, the work nodes are added to a global queue that is accessible by all of the processing cores. Any processing core that becomes available can pull and process the next available work node through to completion, so that the work associated with that work node software object is all completed by the same core, without requiring additional protections for resources that are not multicore safe. Indexes track the location of both the next work node in the global queue for processing and the next location in the global queue for new work nodes to be added for subsequent processing.
    Type: Application
    Filed: April 26, 2017
    Publication date: April 26, 2018
    Inventors: Charles E. Nichols, Scott Terrill, Don Humlicek, Arindam Banerjee, Yulu Diao, Anthony D. Gitchell
  • Patent number: 8819700
    Abstract: A method and apparatus configured to allow independent threads to communicate synchronously through a block of memory accessible to at least two independent threads for bi-directional communication. The method and apparatus simplify the conversion of computer code to a multi-threaded architecture by allowing threads to effectively interact through function calls and data returns.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: August 26, 2014
    Assignee: LSI Corporation
    Inventors: James A. Lynn, Anthony D. Gitchell
  • Publication number: 20120167115
    Abstract: A method and apparatus configured to allow independent threads to communicate synchronously through a block of memory accessible to at least two independent threads for bi-directional communication. The method and apparatus simplify the conversion of computer code to a multi-threaded architecture by allowing threads to effectively interact through function calls and data returns.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Applicant: LSI CORPORATION
    Inventors: James A. Lynn, Anthony D. Gitchell
  • Patent number: 7007191
    Abstract: A system identifies one or more devices having faults in a communication loop. The system includes an interface, a decision module, and a connection processor. The interface is configured for sending requests for information to each device of the communication loop and for receiving responses to the requests. The devices may include computer disk drives for use in a storage system. The requests may include Read-Link Status (RLS) commands sent to the computer disk drives. The RLS commands may provide diagnostics of the disk drives connected to the loop. The decision module is communicatively connected to the interface for weighting the responses of each device to identify the devices having the faults. The responses may be weighted based on the relative potential for disrupting operability of the system. The communication loop may include an FC loop that allows communications between a host system and the computer disk drives.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: February 28, 2006
    Assignee: LSI Logic Corporation
    Inventors: Daniel A. Riedl, James A. Lynn, Anthony D. Gitchell
  • Publication number: 20040039981
    Abstract: A system identifies one or more devices having faults in a communication loop. The system includes an interface, a decision module, and a connection processor. The interface is configured for sending requests for information to each device of the communication loop and for receiving responses to the requests. The devices may include computer disk drives for use in a storage system. The requests may include Read-Link Status (RLS) commands sent to the computer disk drives. The RLS commands may provide diagnostics of the disk drives connected to the loop. The decision module is communicatively connected to the interface for weighting the responses of each device to identify the devices having the faults. The responses may be weighted based on the relative potential for disrupting operability of the system. The communication loop may include an FC loop that allows communications between a host system and the computer disk drives.
    Type: Application
    Filed: August 23, 2002
    Publication date: February 26, 2004
    Inventors: Daniel A. Riedl, James A. Lynn, Anthony D. Gitchell