Patents by Inventor Anthony D. Masterson

Anthony D. Masterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8102916
    Abstract: An integrated circuit receives a compressed input stream having a first compression format. A media processing module converts the compressed input stream to an intermediary compression format for processing without fully decompressing the compressed input stream. After processing, a compressed output stream having a second compression format is generated from the intermediary compression format. Processing is dynamically adjusted responsive to changing network conditions. Optionally, the integrated circuit can receive live, raw video, partially encode it into the intermediary compression format, process it with the media process module as well as take the intermediary compression format, decode and output the live, raw video.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: January 24, 2012
    Assignee: Zenverge, Inc.
    Inventors: Anthony D. Masterson, Amir M. Mobinl
  • Patent number: 8050289
    Abstract: A method and/or system of transmitting media items using aggregating bandwidths of disparate communication channels between a media source and a media player. By using the combined bandwidth of more than one communication channel, a media item that requires a bandwidth larger than a single communication channel can be transmitted. The media source also converts the media item depending on the available bandwidth of the communication channels. By dynamically changing the formats of the media item, more robust and reliable communication between the media source and the media player can be achieved.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: November 1, 2011
    Assignee: Zenverge, Inc.
    Inventors: Anthony D. Masterson, Amir M. Mobini
  • Patent number: 7830800
    Abstract: Systems and methods for processing media streams for transport over a network based on network conditions. An integrated circuit comprises a media processing unit coupled to receive feedback from a network processing unit. The media processing unit converts a media stream from a compressed input stream to a compressed output stream such that the compressed output stream has characteristics that are best suited for the network conditions. Network conditions can include, for example, characteristics of the network (e.g., latency or bandwidth) or characteristics of the remote playback devices (e.g., playback resolution). Changes in the network conditions can result in a change in the conversion process.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: November 9, 2010
    Assignee: Zenverge, Inc.
    Inventors: Anthony D. Masterson, Amir M. Mobini
  • Publication number: 20090196348
    Abstract: A system (and a method) for compressing reference frames in a video transcoder. A transcoder receives a compressed input stream in a first compressed format and output a compressed output stream in a second compressed format. A decoder and an encoder in the transcoder use compressed reference frames. The reference frames are compressed by transforming a block of pixels from a spatial domain to a frequency domain to generate a coefficient array. The coefficient array is quantized and encoded to compress the size of the coefficients array to the size of a fixed bucket. The values of the entropy coded and quantized array are stored in a memory for use in decoding and/or encoding.
    Type: Application
    Filed: January 28, 2009
    Publication date: August 6, 2009
    Applicant: ZENVERGE, INC.
    Inventors: Anthony D. Masterson, Dzung Tien Hoang
  • Patent number: 5257348
    Abstract: A computer subsystem for presenting both video and graphic information on a computer output display in a computer system having a central processing unit and a frame buffer including apparatus for providing a video input signal representing full frame of video interlaced data, apparatus for selecting a rectangular portion of the video data to be presented, apparatus for converting the selected portion of the video signal into a stream of digitized pixel signals, apparatus for designating each such pixel of video information which is to be written to the frame buffer, and apparatus for addressing each of such pixels for storage at selected points of the frame buffer.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: October 26, 1993
    Assignee: Apple Computer, Inc.
    Inventors: Steven G. Roskowski, Elizabeth A. Clough, Anthony D. Masterson
  • Patent number: 5162788
    Abstract: An apparatus and method for taking data that is presented on a NUBUS in NUBUS format and writing it into a video memory in chunky planar format, is described. The present invention is also useful for performing RGB reads wherein video data is read from the video memory in chunky planar format and is translated into NUBUS format for transmission across the NUBUS. The apparatus comprises a data format translator which is coupled to the NUBUS for translating the RGB data from NUBUS format to chunky planar format. The translated RGB data in chunky planar format is compressed and rearranged as compared to the NUBUS format--resulting in a more efficient utilization of video memory space. An address generator is also coupled to the video memory for calculating the address location in the video memory where the translated RGB data is to be written. The address location is derived from the NUBUS address according to the formula N.sub.start =(3*NAD/4) where N.sub.
    Type: Grant
    Filed: June 16, 1989
    Date of Patent: November 10, 1992
    Assignee: Apple Computer, Inc.
    Inventors: James A. Lundblad, Mohammed Sriti, Anthony D. Masterson
  • Patent number: 5097257
    Abstract: An arrangement which includes apparatus for signifying the source of data to be displayed, apparatus for generating lines of data to fit between the lines of interlaced data to be presented on a non-interlaced output display device, and apparatus for generating lines of data to be presented on an interlaced display from a larger number of lines representing non-interlaced data.
    Type: Grant
    Filed: December 26, 1989
    Date of Patent: March 17, 1992
    Assignee: Apple Computer, Inc.
    Inventors: Elizabeth A. Clough, Steven G. Roskowski, Stephen G. Perlman, Anthony D. Masterson
  • Patent number: 4970418
    Abstract: A circuit for providing control signals of selectable lengths capable of being driven off of either the rising or falling edge of a clock pulse, the circuit comprising apparatus for providing signals indicating a mode of operation for access to a matrix of memory elements, apparatus responsive to the signals provided by the apparatus for providing signals indicating a mode of operation for providing signals indicating a clock period during which a control signal is to commence and the edge of the clock signal at which such signal is to commence, and apparatus responsive to the signals provided by the apparatus for providing signals indicating a mode of operation for providing signals indicating a clock period during which a control signal is to terminate and the edge of the clock signal at which such signal is to terminate.
    Type: Grant
    Filed: September 26, 1989
    Date of Patent: November 13, 1990
    Assignee: Apple Computer, Inc.
    Inventor: Anthony D. Masterson