Abstract: Apparatuses for characterizing system channels and associated methods and systems are disclosed. In one embodiment, a tester is coupled to an adaptor configured to plug into a CPU socket of a system platform (e.g., a motherboard). The motherboard includes a memory socket that is connected to the CPU socket through system channels. The adaptor may include a connector configured to physically and electrically engage with the CPU socket, an interface configured to receive test signals from the tester, and circuitry configured to internally route the test signals to the connector. The adaptor, if plugged into the CPU socket, can facilitate the tester to directly assess signal transfer characteristics of the system channels. Accordingly, the tester can determine optimum operating parameters for the memory device in view of the system channel characteristics.

Abstract: Apparatuses for characterizing system channels and associated methods and systems are disclosed. In one embodiment, a tester is coupled to an adaptor configured to plug into a CPU socket of a system platform (e.g., a motherboard). The motherboard includes a memory socket that is connected to the CPU socket through system channels. The adaptor may include a connector configured to physically and electrically engage with the CPU socket, an interface configured to receive test signals from the tester, and circuitry configured to internally route the test signals to the connector. The adaptor, if plugged into the CPU socket, can facilitate the tester to directly assess signal transfer characteristics of the system channels. Accordingly, the tester can determine optimum operating parameters for the memory device in view of the system channel characteristics.

Abstract: A timebase circuit for use in the vertical timebase of a television receiver in which a linearity control current fed to the ramp capacitor is derived by multiplying a current proportional to the difference between the instantaneous and average ramp voltages by a reference current which may be adjusted to control linearity.

Abstract: A circuit for controlling a CRT including a control which monitors tube parameters and adjusts the nominal cut-off level of the tube cathode current accordingly, sensing when the control is near an extreme of its range of adjustment and responsive to the sensing to change a control signal applied to a grid of the tube so as to bring the nominal cut off level control loop within its range of adjustment.

Abstract: A timebase circuit is described, for compensation of picture dimensions of a television type display, for EHT fluctuations in which a control current is derived by multiplying a current dependent upon the picture beam current with a reference current derived from a digital to analogue converter fed with a digital code.

Abstract: A timebase circuit is described for providing a horizontal drive correction waveform to correct for pincushion distortion in which a parabolic correction current is derived by squaring a current proportional to the difference between the instantaneous and average values of the vertical ramp voltage. The correction current may be tilted by combination with a linear current proportional to the ramp voltage and may also be amplitude controlled.

Abstract: An apparatus and method for the automatic setup of a CRT operating point, or dc signal level (black), as well as the contrast, or gain level (gray), of a video display by sampling the CRT signal level of the individual cathodes and locking the dc signal level to a common dc setup reference and gain level to a value determined by a common contrast control signal and gain reference. An apparatus and method in which a common brightness control signal is modulated by a common contrast control signal such that a brightness control pedestal is added to each video signal path of a video display whereby picture black level does not change with contrast.

Abstract: A current mirror circuit arrangement wherein an output current is provided by an output transistor and coupled between the base electrode of the output transistor and a reference potential is a series combination of a resistor and a diode. Signals are fed to the base electrode of the output transistor from a voltage supply via an emitter follower circuit and a resistor is connected across the diode so as to share current with the diode to increase its impedance at low current values and consequently to improve the overall linearity of the output current input voltage characteristic.

Abstract: A TV timebase circuit includes a vertical sync counter in the form of a ten-bit ripple-through counter. Additional logic circuitry including a pair of divide-by-four counters, a latch, a D flip-flop, and associated AND, NAND, and invertor gates are also provided. The circuit is responsive to a multiple of the horizontal frequency and to vertical sync pulses and is capable of automatic recognition of 525 or 625 line standard. The logic includes a mechanism for locking out the vertical counter's 525 count when operating in the 625 mode. The latch, in association with one of the divide-by-four counters serves a "fly wheel" sync function, whereby a predetermined number of "matches" must be recognized to lock the circuit into a given mode, and whereby a predetermined number of "mis-matches" must occur to drop the circuit operation from the locked-in mode. Several outputs are taken off the vertical counter to operate ramp drive and blanking functions of the TV vertical sweep generator.

Abstract: A phase detector circuit has low offsets and is easily made as a bipolar integrated circuit. A first input to the phase detector controls a transistor which in turn controls a current source. The output of the current source is connected to a current mirror which has an NPN transistor. The current mirror is connected to ground by a transistor which is controlled by a second input signal. When the first input signal is present and is out of phase with the second input signal the output of the phase detector flows from the current source through the collector base junction of the NPN transistor. When both input signals are in phase the output of the phase detector serves as a current sink whose current carrying capabilities is controlled by the output of the current source.