Patents by Inventor Anthony D. Wang

Anthony D. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11957962
    Abstract: A golf club head including a club face defined by a toe end, a heel end, a top rail and a sole. The golf club head including a plurality of grooves disposed on the club face between the top rail and the sole. Each groove extends between the toe end and the heel end. Widths of the grooves vary in a direction extending between the heel end and the toe end.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Karsten Manufacturing Corporation
    Inventors: Anthony D. Serrano, Paul D. Wood, Bradley D. Schweigert, Calvin S. Wang, John A. Solheim
  • Patent number: 5847912
    Abstract: An active rectifier circuit for automatically selecting a pathway for reversible current to move. The rectifier circuit includes a transistor element that is preferably a MOSFET controlled by an amplifier. The amplifier is coupled to a reference voltage source that regulates operation of the transistor element at a potential much lower than is currently available with diode devices. In one application, the rectifier is a battery protection circuit for use within rechargeable battery packs. The battery protection circuit employs the amplifier to drive a pair of discrete MOSFETs having their sources coupled together. In this application, the amplifier functions as a sensitive current detector. The battery protection circuit automatically detects when any battery cell is over-charged or under-charged thereby opening and protecting the MOSFETs. The battery protection circuit determines the direction of current flow within the battery pack.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: December 8, 1998
    Inventors: Gregory J. Smith, Anthony D. Wang
  • Patent number: 4897616
    Abstract: A wideband integrated circuit amplifier includes a pair of current mirror circuits sensing emitter currents of NPN and PNP transistors in the amplifier output stage. A pair of current mirror circuits divide the emitter currents, respectively, by a factor of 20. The current mirror output currents are summed, current splitter directs approximately 1/20 of the summed mirror currents through a transistor, the collector of which is coupled to the gate electrode of a field effect input transistor of a bias control circuit, to produce a scaled down feedback current. A high impedance current source is connected to the collector of the transistor. The bias circuit adjusts the DC bias voltage applied between the base electrodes of the transistors to cause the scaled down feedback current to equal the constant current. A very small compensation capacitor produces a low frequency pole that prevents the bias circuit from interfering with high frequency performance characteristics of a wide band amplifier.
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: January 30, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Anthony D. Wang, R. Mark Stitt, II
  • Patent number: 4893091
    Abstract: A complementary current mirror includes a PNP transistor and an NPN transistor, one of which serves as a control transistor and the other of which serves as an output transistor. A V.sub.BE voltage generated by forcing a control current into or out of the emitter of the control transistor is imposed between the base and emitter of the output transistor to produce a controlled current in the collector of the output transistor. A first such current mirror, with an NPN control transistor, and a second such current mirror, with a PNP control transistor, are driven by the same control current to supply first and second input bias currents to a diamond follower circuit in the same integrated circuit as the first and second current mirror circuits to face the V.sub.BE voltage of the PNP and NPN transistors of the diamond follower circuit to be equal despite variation in saturation currents of the PNP and NPN transistsors. This results in zero input offset for the diamond follower circuit.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: January 9, 1990
    Assignee: Burr-Brown Corporation
    Inventors: William J. Lillis, Anthony D. Wang
  • Patent number: 4521765
    Abstract: An integrated circuit digital to analog converter includes circuitry having first and second resistors in a R/2R resistor ladder which scales bit current contributions to an analog output current. Each of the first and second resistors have a respective terminal connected to the collector of a bit current transistor, the emitter of which is connected to the emitter of a waste current transistor. The digital to analog converter includes a metal ground voltage conductor having a "shared node" and a distributed resistance between one side of the shared node and a main ground voltage connection. The collector of the waste current transistor and a second terminal of the first resistor are both connected directly to the shared node. In operation, the waste current transistor switches waste current into the shared node, rather than into a separate waste current ground conductor.
    Type: Grant
    Filed: May 4, 1983
    Date of Patent: June 4, 1985
    Assignee: Burr-Brown Corporation
    Inventors: Anthony D. Wang, Donald L. Brumbaugh
  • Patent number: 4468652
    Abstract: A monolithic digital-to-analog converter integrated circuit is disclosed including a first plurality of more significant bit switches having scaled bit switch currents and including a second plurality of lesser significant bit switches, the output nodes of which are coupled to a ladder network which contributes a binary-weighted portion of each lesser significant bit switch current to the summed analog output current. First and second output conductors, separate and apart from one another, are used to couple the output nodes of the more significant bit switches and the output current of the ladder network, respectively, to the analog output current pad. First and second ground voltage pads are included for isolating waste current conducted by the more significant bit switches from currents returned by the ladder network to the ground voltage. The waste current nodes of the lesser significant bit switches are conducted to the same ground voltage pad that conducts the currents returned by the ladder network.
    Type: Grant
    Filed: September 22, 1982
    Date of Patent: August 28, 1984
    Assignee: Burr-Brown Research Corporation
    Inventors: Anthony D. Wang, Donald L. Brumbaugh
  • Patent number: 4423409
    Abstract: A digital-to-analog converter circuit includes an open-loop reference circuit for regulating a plurality of bit switch currents and utilizes a high-speed single-ended input interface network for level shifting digital input signals to the bit switches whereat the level shifted input signals switch against a substantially fixed threshold voltage. The single-ended input interface network includes a PNP input transistor coupled to an input terminal and coupled by a resistor to a regulated voltage. The PNP input transistor is coupled to a level shifting network including an emitter follower transistor and a zener junction biased by a current source. The threshold voltage is also developed by a level shifting network that includes a zener junction for compensating variations within the level shifting network of the single-ended input interface network.
    Type: Grant
    Filed: April 3, 1981
    Date of Patent: December 27, 1983
    Assignee: Burr-Brown Research Corporation
    Inventors: Jimmy R. Naylor, William J. Lillis, Anthony D. Wang
  • Patent number: 4381497
    Abstract: An open-loop voltage reference circuit, adapted to regulate a plurality of bit switch currents within a digital-to-analog converter, includes a zener diode reference leg for developing a reference voltage. The reference leg also includes a base-emitter junction voltage multiplier for creating a compensating voltage having a temperature tracking coefficient that is equal and opposite to that of the zener diode junction voltage. The reference voltage developed by the reference leg is used to bias a temperature independent current within a slave leg, and a current mirror circuit mirrors the current within the slave leg for supplying a constant current to the reference leg. The magnitude of the reference voltage is reduced through a divider leg, and an emitter follower leg provides a low impedance bias voltage for driving the plurality of bit switch current sources.
    Type: Grant
    Filed: April 3, 1981
    Date of Patent: April 26, 1983
    Assignee: Burr-Brown Research Corporation
    Inventors: William J. Lillis, Jimmy R. Naylor, Anthony D. Wang, Robert L. White
  • Patent number: RE49856
    Abstract: A golf club head including a club face defined by a toe end, a heel end, a top rail and a sole. The golf club head including a plurality of grooves disposed on the club face between the top rail and the sole. Each groove extends between the toe end and the heel end. Depths of the grooves vary in a direction extending between the top rail and the sole and in a direction extending between the heel end and the toe end. Widths of each of the plurality of grooves vary in a direction extending between the heel end and the toe end.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: March 5, 2024
    Assignee: Karsten Manufacturing Corporation
    Inventors: Anthony D. Serrano, Paul D. Wood, Bradley D. Schweigert, Calvin S. Wang, John A. Solheim
  • Patent number: RE49857
    Abstract: Embodiments of grooves of golf club heads and methods to manufacture grooves of golf club heads are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: March 5, 2024
    Assignee: Karsten Manufacturing Corporation
    Inventors: Anthony D. Serrano, Paul D. Wood, Bradley D. Schweigert, Calvin S. Wang, John A. Solheim