Abstract: An optical system comprises a hybrid optical motherboard having a plurality of optical interconnections formed therein, and a connector. A connector region is formed in, but does not extend completely along, an edge portion of the hybrid optical motherboard. The connector region contains a number of optical interconnections, and the connector contains an optical device. The connector is connectible to the connector region to align the optical device of the connector with the optical interconnections contained in the connector region. The connector and the connector region each comprises first and second substrates made of crystalline material and containing intersecting planes which can be delineated by etching. Each first substrate is formed with etched alignment grooves, and each second substrate is formed with etched alignment grooves which are complementary to the alignment grooves of the associated first substrate.

Abstract: A method of forming a pair of V-grooves in alignment with an array of planar waveguides comprises the steps of simultaneously forming cores for the waveguides and windows for the V-grooves covering the cores with a protective layer and forming the V-grooves through the windows. The method is such that the V-grooves are formed on each side of the array of waveguides.

Abstract: A micromechanical switch is formed using a first sacrificial layer formed on a substrate. A second sacrificial layer is then formed as an island on the first sacrificial layer. A switch element layer of resilient material is then formed on the second sacrificial layer, and the outline of a switch element is defined on the switch element layer. The outline of a window is then defined, and the second sacrificial layer is etched through the window using an etchant which laterally undercuts that portion of the switch element layer which is to form the switch element. The first sacrificial layer is then etched through the window defined by the etched second sacrificial layer to define a cavity beneath said portion, thereby defining the switch element.

Abstract: A heterojunction bipolar transistor has an emitter which comprises an expitaxial layer of silicon grown on a silicon and germanium base layer. The active region of the transistor comprises a semiconductor having a silicon/silicon and germanium strained lattice and the silicon and germanium base layer is grown on a silicon substrate while maintaining commensurate growth. The lattice strain is such as to produce a predetermined valence band offset at the emitter/base junction. The mobility in the base is also enhanced over that of an unstrained alloy of the same composition.

Abstract: Regions of the substrate which are to be the collector sinker and the active area of a bipolar transistor are isolated by forming a trench about them and filling it with a dielectric. The dielectric can be oxide formed in a LOCOS process. A dielectric body, which may be nitride, is formed on part of the active area, and base contacts implanted using it as a mask. Polysilicon is deposited over the whole and then cut to form future metallization-to-base contacts. The dielectric body is removed and the base implanted through the resulting aperture. Oxide spacers are formed on the sidewall of the aperture and polysilicon deposited. The polysilicon is doped and used to produce the emitter by driving the dopant into the substrate between the oxide spacers.