Patents by Inventor Anthony E. Zortea

Anthony E. Zortea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6389090
    Abstract: For a digital communications receiver, a clock and data signal recovery circuit and method use an all digital delay locked loop timed by an on-chip transmit clock signal. The digital delay locked loop includes a phase detector and loop filter. The phase detector determines, for each data signal rising or falling edge, if the current delay of a reference clock signal leads or lags the data signal edge. The loop filter examines the stream of such lead/lag indications, performs a nonlinear filtering process thereon, and in response increases or decreases the clock signal phase appropriately.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: May 14, 2002
    Assignee: 3Com Corporation
    Inventors: Anthony E. Zortea, Kenneth Paist
  • Publication number: 20010038675
    Abstract: For a digital communications receiver, a clock and data signal recovery circuit and method use an all digital delay locked loop timed by an on-chip transmit clock signal. The digital delay locked loop includes a phase detector and loop filter. The phase detector determines, for each data signal rising or falling edge, if the current delay of a reference clock signal leads or lags the data signal edge. The loop filter examines the stream of such lead/lag indications, performs a nonlinear filtering process thereon, and in response increases or decreases the clock signal phase appropriately.
    Type: Application
    Filed: February 6, 1998
    Publication date: November 8, 2001
    Inventors: ANTHONY E. ZORTEA, KENNETH PAIST
  • Patent number: 6047032
    Abstract: In a digital communication system, analog equalization and data recovery are provided with non-linear digital feedback at the receiver, to overcome frequency domain distortion imposed by the communications channel. Digital information from the clock and data recovery circuit is non-linearly filtered and then fed back so as to modulate the threshold of a slicer which receives the signal which has been analog equalized. Thereby any shortcomings in the equalization, slicer, or clock and data recovery are overcome by adjusting the slicer threshold at each clock cycle in response to the recovered clock and data signals.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: April 4, 2000
    Assignee: Integrated Circuit Systems, Inc.
    Inventors: Anthony E. Zortea, Todd A. Wey
  • Patent number: 5844439
    Abstract: A DC restoration circuit to correct for baseline wandering in a data receiver is provided. A voltage correction circuit is connected to the received data line to adjust the voltage level of the received data dynamically. The voltage correction circuit is controlled by a feedback circuit which includes a voltage detection circuit configured to detect the peak voltage levels or envelope of the received data. This detected level is then compared to a reference level, and the result of the comparison is used as a control signal for the voltage correction circuit.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: December 1, 1998
    Assignee: Integrated Circuit Systems, Inc.
    Inventor: Anthony E. Zortea
  • Patent number: 5809072
    Abstract: An equalizer receives an analog input signal and filters the signal to undistort the input signal. A converter stage converts the analog input signal into a digital output signal for use in a digital system. A bit sequence indicator analyzes the structure of the digital output signal to determine whether any errors have occurred in transmission and conversion. An adaptor state machine causes the modification of the analog signal based on a feedback loop including information on the errors detected in the packets of digital signals, rather than the analog data itself.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: September 15, 1998
    Assignee: Integrated Circuit Systems
    Inventors: Anthony E. Zortea, James McGough, Kenneth Paist
  • Patent number: 5548697
    Abstract: A color corrector for changing pixels in an image where the color corrector includes a neural fuzzy classifier to generate a membership value which defines a degree of membership of each pixel in a group of pixels to be transformed. A pixel color changer is also provided to transform the pixel according to its membership in the group of pixels to be changed. The color corrector can also include a pixel group classifier for identifying groups of pixels in the image to train the neural fuzzy classifier to generate the membership value.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: August 20, 1996
    Assignee: Panasonic Technologies, Inc.
    Inventor: Anthony E. Zortea
  • Patent number: 5493334
    Abstract: A video camera generates an approximation of the dark current or black shading distortion signals based on scan position in the image, and subtracts the approximation signal from the signal generated by the camera during normal image-sensing operation to reduce the black shading distortion. In a particular embodiment of the invention, counters generate location signals representative of the location of pixel currently being read, and the location signals are processed by functions such as squaring or raising to a constant power, and by weighting, to produce components of the approximation of the dark signal. The components are subtracted from the imager signal, to reduce the dark shading. In one embodiment of the invention, the functions are automatically selected from among a plurality of preselected functions, and implemented by look-up tables.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: February 20, 1996
    Assignee: Panasonic Technologies, Inc.
    Inventors: Anthony E. Zortea, Peter Westerink
  • Patent number: 5376963
    Abstract: A signal processing system for a video camera uses a single neural network to implement multiple nonlinear signal processing functions. In one example, the neural network implements gamma correction and contrast compression, in another example, color correction and aperture correction are added to the combined function emulated by the network. The network is trained using back propagation to emulate one function then a combination of two functions, then a combination of three functions, and so on. The programmed neural network replaces multiple pipelined signal processors in the video camera. The use of a single neural network in place of the multiple dedicated processing functions reduces engineering effort to develop the product and may reduce the cost of the total system.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: December 27, 1994
    Assignee: Panasonic Technologies, Inc.
    Inventor: Anthony E. Zortea
  • Patent number: 5122863
    Abstract: A test apparatus for video signal produces a two dimensional projection of a three dimensional display of video variables. The variables can be luminance, saturation and hue; luminance, R-Y and B-Y color difference; red, blue and green amplitude; or luminance, I and Q, for example. The variables can be displayed with the R-Y and B-Y color differences on X and Y axes in a plane, with luminance on a Z axis perpendicular to the plane. The display is rotated for ease of viewing of the projection, and is preferably rotatable under operator control, in at least one axis of rotation. The axis of rotation can be in the plane of X and Y. A graticle which represents reference points in a standard vectorscope display can be superimposed on the projection. Points representing the saturation and hue phase angle of colors of a standard color bar test pattern, and graticle lines parallel to the Z axis, can also be included.
    Type: Grant
    Filed: September 14, 1990
    Date of Patent: June 16, 1992
    Assignee: Videotek, Inc.
    Inventor: Anthony E. Zortea
  • Patent number: 5046030
    Abstract: A remapping apparatus and method dynamically map the endpoints of a manual control to scaled and shifted values of a controlled parameter magnitude, such that the full span of the control corresponds to transition of a controlled parameter between desired endpoints, normally over less than the full possible span of transition. The mapping is recalculated repetitively and accounts for constraints on the controlled parameter resulting from variations in related parameters. The apparatus and method are especially applicable to controlling transition effects produced by a video switcher. A digital computer senses the position of the control and registers the level of a controlled parameter (and preferably also the level of constraining related parameters).
    Type: Grant
    Filed: February 16, 1990
    Date of Patent: September 3, 1991
    Assignee: Videotek Incorporated
    Inventors: David W. Bitter, Anthony E. Zortea, Douglas C. Crawford