Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.

Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.

Abstract: A control system controls a physical layer quality of user data transmitted between first and second ends of a serial bus. The control system comprises a first line driver that has a control input that controls the physical layer quality at the first end. A physical layer quality sensor senses the physical layer quality at the second end and generates control primitives that are fed back over the serial bus to the control input to provide closed loop control of the physical layer quality.

Abstract: The queue execution mode is selected based on the unique tag that is assigned to the command. In one method embodiment a tag is assigned for each of several disc access commands sent by the host. Two or more queues are created, each having a queue execution mode. Which of the queues is assigned to the command depends on the command's tag. One device embodiment comprises a data storage disc, a memory, and a controller. The memory is configured to hold several pending commands for accessing the disc(s),each of the commands having a unique tag. The controller is configured to execute each queued command according to a mode that is determined base on the command's tag.

Abstract: A method and apparatus for increasing the bandwidth of a memory controller system are provided. According to the invention, data received at an interface of a memory controller system is compressed in the memory controller by a compression engine for storage in associated memory. The address of the data written to memory is maintained in a memory controller. When data is read from the memory for provision to an interface of the memory controller, the memory manager retrieves the data from memory and provides it to a decompression engine. The decompression engine restores the data to its original, uncompressed form. The data is then provided to the appropriate interface.

Abstract: The queue execution mode is selected based on the unique tag that is assigned to the command. In one method embodiment, a tag is assigned for each of several disc access commands sent by the host. Two or more queues are created, each having a queue execution mode. Which of the queues is assigned to the command depends on the command's tag.

Abstract: A method for reducing radio frequency interference from a high frequency serial bus by scrambling data signals and reducing the repetition of control signals. Beginning and ending control signals are provided with meaningless signals provided therebetween.

Abstract: A digital computer system includes at least one process, an input/output subsystem, and an input/output interface. The process which input/output requests and receives input/output responses. The input/output system perform input/output operations and generates completion notifications in response thereto. The input/output interface generates input/output responses for the process in the order in which the process issued the input/output requests, to reduce the possibility of the process obtaining information from the order in which the input/output system processed input/output requests.