Abstract: RAID storage systems and methods adapted to enable the use of NAND flash-based solid-state drives. The RAID storage system includes an array of solid-state drives and a controller operating to combine the solid-state drives into a logical unit. The controller utilizes data striping to form data stripe sets comprising data (stripe) blocks that are written to individual drives of the array, utilizes distributed parity to write parity data of the data stripe sets to individual drives of the array, and writes the data blocks and the parity data to different individual drives of the array. The RAID storage system detects the number of data blocks of at least one of the data stripe sets and then, depending on the number of data blocks detected, may invert bit values of the parity data or add a dummy data value of “1” to the parity value.

Abstract: RAID storage systems and methods adapted to enable the use of NAND flash-based solid-state drives. The RAID storage system includes an array of solid-state drives and a controller operating to combine the solid-state drives into a logical unit. The controller utilizes data striping to form data stripe sets comprising data (stripe) blocks that are written to individual drives of the array, utilizes distributed parity to write parity data of the data stripe sets to individual drives of the array, and writes the data blocks and the parity data to different individual drives of the array. The RAID storage system detects the number of data blocks of at least one of the data stripe sets and then, depending on the number of data blocks detected, may invert bit values of the parity data or add a dummy data value of “1” to the parity value.

Abstract: RAID storage systems and methods adapted to enable the use of NAND flash-based solid-state drives. The RAID storage system includes an array of solid-state drives and a controller operating to combine the solid-state drives into a logical unit. The controller utilizes data striping to form data stripe sets comprising data (stripe) blocks that are written to individual drives of the array, utilizes distributed parity to write parity data of the data stripe sets to individual drives of the array, and writes the data blocks and the parity data to different individual drives of the array. The RAID storage system detects the number of data blocks of at least one of the data stripe sets and then, depending on the number of data blocks detected, may invert bit values of the parity data or add a dummy data value of “1” to the parity value.

Abstract: Solid-state mass storage devices, host computer systems, and methods of managing non-volatile solid-state memory components used therein. The memory components comprise memory cells organized in functional units that are adapted to receive units of data transferred from the host computer system and correspond to the functional units of the memory component. The level of programming for each cell is reduced by performing an analysis of the bit values of the units of data to be written to at least a first of the functional units of the memory component. Depending on the analysis of “0” and “1” bit values of the units of data to be written, the bit values are inverted before writing the units of data to the first memory component.

Abstract: A method for altering and preferably optimizing the performance of system memory of a computer system. The method includes identifying the motherboard and the memory module of the computer system, and then searching multiple SPD update files associated with multiple motherboards and containing data corresponding to physical and operational characteristics of multiple memory modules. From these SPD update files, a compatible SPD update file is identified that is compatible with the motherboard and contains data corresponding to physical and operational characteristics of the memory module. Thereafter, a software utility is used to erase pre-existing SPD data stored on the SPD circuit device and then write and verify installation of the data of the compatible SPD update file on the SPD circuit device. New SPD settings for the memory module are then enabled based on the data of the compatible SPD update file.

Abstract: A solid state drive having a non-volatile memory device and methods of operating the solid state drive to compare existing data stored on the memory device to subsequent data in an incoming data stream received by the solid state drive from a host system. If matching data are found, the solid state drive uses the existing data instead of writing the subsequent data to the memory device. Common data patterns can be shared among different files stored on the memory device.

Abstract: Solid-state mass storage devices, host computer systems, and methods of increasing the endurance of non-volatile solid-state memory components used therein. The memory components comprise memory cells organized in functional units that are adapted to receive units of data transferred from the host computer system and correspond to the functional units of the memory component. The level of programming for each cell is reduced by performing an analysis of the bit values of the units of data to be written to at least a first of the functional units of the memory component. Depending on the analysis of “0” and “1” bit values of the units of data to be written, the bit values are inverted before writing the units of data to the first memory component.

Abstract: A connector assembly and method suitable for making data and power connections with mass storage devices that use the SATA interface standard. The connector assembly includes a connector having a pair of oppositely-disposed surfaces, a face between the surfaces, and data and power connector portions disposed in the face. The data and power connector portions are adapted to establish data and power connections between the connector and a SATA interface of a mass storage device. The connector assembly further has data and power cables for transmitting, respectively, data and power through the data and power connector portions of the connector. Opposing clips protrude from the oppositely-disposed surfaces of the connector and project beyond the face of the connector. The clips engage opposing sides of the mass storage device and mechanically stabilize the data and power connections between the connector and the SATA interface of the mass storage device.

Abstract: RAID storage systems and methods adapted to enable the use of NAND flash-based solid-state drives. The RAID storage system includes an array of solid-state drives and a controller operating to combine the solid-state drives into a logical unit. The controller utilizes data striping to form data stripe sets comprising data (stripe) blocks that are written to individual drives of the array, utilizes distributed parity to write parity data of the data stripe sets to individual drives of the array, and writes the data blocks and the parity data to different individual drives of the array. The RAID storage system detects the number of data blocks of at least one of the data stripe sets and then, depending on the number of data blocks detected, may invert bit values of the parity data or add a dummy data value of “1” to the parity value.

Abstract: A method of maintaining a solid-state drive so that free space within memory blocks of the drive becomes free usable space to the drive. The drive comprises cells organized in pages that are organized in memory blocks in which at least user files are stored. A defragmentation utility is executed to cause at least some of the memory blocks that are partially filled with data and contain file fragments to be combined or aligned and to cause at least some of the memory blocks that contain only invalid data to be combined or aligned. A block consolidation utility is then executed to eliminate at least some of the partially-filled blocks by consolidating the file fragments into a fewer number of the memory blocks. The consolidation utility also increases the number of memory blocks that contain only invalid memory. All of the memory blocks containing only invalid data are then erased.

Abstract: A connector assembly and method suitable for making data and power connections with mass storage devices that use the SATA interface standard. The connector assembly includes a connector having a pair of oppositely-disposed surfaces, a face between the surfaces, and data and power connector portions disposed in the face. The data and power connector portions are adapted to establish data and power connections between the connector and a SATA interface of a mass storage device. The connector assembly further has data and power cables for transmitting, respectively, data and power through the data and power connector portions of the connector. Opposing clips protrude from the oppositely-disposed surfaces of the connector and project beyond the face of the connector. The clips engage opposing sides of the mass storage device and mechanically stabilize the data and power connections between the connector and the SATA interface of the mass storage device.

Abstract: A method for altering and preferably optimizing the performance of system memory of a computer system. The method includes identifying the motherboard and the memory module of the computer system, and then searching multiple SPD update files associated with multiple motherboards and containing data corresponding to physical and operational characteristics of multiple memory modules. From these SPD update files, a compatible SPD update file is identified that is compatible with the motherboard and contains data corresponding to physical and operational characteristics of the memory module. Thereafter, a software utility is used to erase pre-existing SPD data stored on the SPD circuit device and then write and verify installation of the data of the compatible SPD update file on the SPD circuit device. New SPD settings for the memory module are then enabled based on the data of the compatible SPD update file.