Abstract: Methods of MOL S/D contact patterning of RMG devices without gouging of the Rx area or replacement of the dielectric are provided. Embodiments include forming a SOG layer around a RMG structure, the RMG structure having a contact etch stop layer and a gate cap layer; forming a lithography stack over the SOG and gate cap layers; patterning first and second TS openings through the lithography stack down to the SOG layer; removing a portion of the SOG layer through the first and second TS openings, the removing selective to the contact etch stop layer; converting the SOG layer to a SiO2 layer; forming a metal layer over the SiO2 layer; and planarizing the metal and SiO2 layers down to the gate cap layer.

Abstract: Methods of MOL S/D contact patterning of RMG devices without gouging of the Rx area or replacement of the dielectric are provided. Embodiments include forming a SOG layer around a RMG structure, the RMG structure having a contact etch stop layer and a gate cap layer; forming a lithography stack over the SOG and gate cap layers; patterning first and second TS openings through the lithography stack down to the SOG layer; removing a portion of the SOG layer through the first and second TS openings, the removing selective to the contact etch stop layer; converting the SOG layer to a SiO2 layer; forming a metal layer over the SiO2 layer; and planarizing the metal and SiO2 layers down to the gate cap layer.

Abstract: A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method forming a semiconductor that includes flash memory cell having floating gate, then forming a the substrate. Process induced charge that has accumulated on the flash cell floating gate is then neutralized and a passivation layer, which is no transparent to ultraviolet light, is formed on the conductive layer.

Abstract: A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method comprises forming a semiconductor substrate that includes a flash memory cell having a floating gate, then forming a conductive layer on the substrate. Process induced charge that has accumulated on the flash cell floating gate is then neutralized and a passivation layer, which is not transparent to ultraviolet light, is formed on the conductive layer.

Abstract: A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method comprises forming a semiconductor substrate that includes a flash memory cell having a floating gate, then forming a conductive layer on the substrate. Process induced charge that has accumulated on the flash cell floating gate is then neutralized and a passivation layer, which is not transparent to ultraviolet light, is formed on the conductive layer.