Patents by Inventor Anthony P. Calderone

Anthony P. Calderone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6850123
    Abstract: A test oscillator circuit separately measures the signal propagation delay for both rising and falling edges through one or more multi-input combinatorial logic circuits. A number of components are configured in a loop so that they together form a free-running ring oscillator. Each synchronous component passes signal edges to a subsequent component in the ring, so the oscillator produces an oscillating test signal in which the period relates to the delays through the components. In some embodiments, the multi-input combinatorial logic circuits emulate tri-state buffers. These embodiments characterize the speed at which these logic circuits enable and disable signal paths.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: February 1, 2005
    Assignee: Xilinx, Inc.
    Inventors: Himanshu J. Verma, Anthony P. Calderone, Richard D. Duce
  • Patent number: 6594610
    Abstract: A new testing method uses a field programmable gate array to emulate faults, instead of using a separate computer to simulate faults. In one embodiment, a few (e.g., two or three) known good FPGAs are selected. A fault is introduced into the design of a FPGA configuration. The configuration is loaded into the FPGAs. A test vector is applied and the result is evaluated. If the result is different from that of a fault-free configuration, the fault is caught. One application of this method is to evaluate fault coverage. A fault model that can be used in the present invention is disclosed.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: July 15, 2003
    Assignee: Xilinx, Inc.
    Inventors: Shahin Toutounchi, Anthony P. Calderone, Zhi-Min Ling, Robert D. Patrie, Eric J. Thorne, Robert W. Wells
  • Patent number: 6507942
    Abstract: Described are systems and methods for measuring the size uniformity of circuit features defined by the critical dimension of an integrated-circuit fabrication process. An integrated circuit is configured to include a number of oscillators, each occupying a region of the integrated circuit. Each oscillator oscillates at a frequency that depends on the critical dimension of features in the region in which it is formed. Consequently, the critical dimensions of regions across the surface of the integrated circuit can be mapped and compared by comparing the oscillation frequencies of identical oscillators formed in various regions of the integrated circuit. In programmable logic devices, oscillators can be implemented using programmable logic resources. In other embodiments, small, simple oscillators can be placed at various locations on the integrated circuit.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: January 14, 2003
    Assignee: Xilinx , Inc.
    Inventors: Anthony P. Calderone, Feng Wang, Tho Le La