Patents by Inventor Anthony PAYET

Anthony PAYET has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11010532
    Abstract: A simulation method includes storing a plurality of structure parameters of transistors for a semiconductor chip, imaging generating a first local layout which includes a first structure parameter extracted from a semiconductor device included in the first local layout, the first structure parameter being an actual parameter determined using the imaging equipment, generating second to n-th local layouts by modifying the first structure parameter included in the first local layout, wherein the second to n-th local layouts respectively have second to n-th structure parameters modified from the first structure parameter, calculating first to n-th effective density factors (EDF) respectively for the first to n-th structure parameters, determining a first effective open silicon density for a first chip using the first to n-th effective density factors and a layout of the first chip, and calculating first to m-th epitaxy times for first to m-th effective open silicon densities.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: May 18, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Alexander Schmidt, Dong-Gwan Shin, Anthony Payet, Hyoung Soo Ko, Seok Hoon Kim, Hyun-Kwan Yu, Si Hyung Lee, In Kook Jang
  • Publication number: 20200342157
    Abstract: A simulation method and system which can determine a predictable epitaxy time by accurately reflecting layout characteristics of a chip and characteristics of a source/drain formation process are provided.
    Type: Application
    Filed: February 18, 2020
    Publication date: October 29, 2020
    Inventors: Alexander SCHMIDT, Dong-Gwan SHIN, Anthony PAYET, Hyoung Soo KO, Seok Hoon KIM, Hyun-Kwan YU, Si Hyung LEE, In Kook JANG