Abstract: The present disclosure relates to a multipath amplifier method and circuit comprising a first and a second amplification path for an input voltage, coupled in parallel, the first path comprising a first amplifier stage, a second amplifier stage and a notch filter between a first node coupled to the second amplifier stage and a second node coupled to an output of the first amplifier stage, and a control unit configured, following detection of a change in common mode of the input voltage, for a first duration to open the first path and to couple the first node to the second node through a unity-gain amplifier.

Abstract: A bandgap circuit includes: a first resistor receiving a voltage proportional to the temperature; a second resistor receiving a voltage complementary to absolute temperature; and a third resistor where the sum of the currents in the first and second resistors flows. Each of the second and third resistors comprises a fixed resistance part and N controllable resistance parts, with N greater than or equal to 2. Each controllable resistance part of the second resistor is associated with a corresponding controllable resistance part of the third resistor. A control circuit supplies, for each controllable resistance part, the same control signal to this controllable resistance part and its associated controllable resistance part.

Abstract: A voltage divider circuit includes at least two FDSOI transistors (TP1, TP2) of a first type connected to a first supply potential and arranged in a current mirror structure, two FDSOI transistors (TN1, TN2) of a second type and an electrical load (R), the drain of a first—respectively second—transistor (TN1) of the second type being connected to the drain of a first—respectively second—transistor (TP1) of the first type, the drain of the first transistor of the second type being connected to the front-face gate of this same transistor, the front-face gates of the first and second transistors of the second type being connected to one another, the source of the first transistor of the second type being connected to a second supply potential and the load being placed between the source of the second transistor of the second type and the second supply potential.

Abstract: An interface electronic circuit between an energy harvesting stage is provided with an inductor and a charging stage, the interface electronic circuit having a regulation circuit capable of servo-controlling an average input impedance value of the interface electronic circuit to a predetermined optimum impedance value.

Abstract: An interface electronic circuit between an energy harvesting stage is provided with an inductor and a charging stage, the interface electronic circuit having a regulation circuit capable of servo-controlling an average input impedance value of the interface electronic circuit to a predetermined optimum impedance value.

Abstract: A voltage divider circuit includes at least two FDSOI transistors (TP1, TP2) of a first type connected to a first supply potential and arranged in a current mirror structure, two FDSOI transistors (TN1, TN2) of a second type and an electrical load (R), the drain of a first—respectively second—transistor (TN1) of the second type being connected to the drain of a first—respectively second—transistor (TP1) of the first type, the drain of the first transistor of the second type being connected to the front-face gate of this same transistor, the front-face gates of the first and second transistors of the second type being connected to one another, the source of the first transistor of the second type being connected to a second supply potential and the load being placed between the source of the second transistor of the second type and the second supply potential.

Abstract: A transistor biasing circuit including a first controller configured to receive a sensor signal generated based on the performance of one or more transistors of a digital circuit and to compare the sensor signal with a reference signal and to generate a first biasing voltage control signal; a first actuator configured to generate a first biasing voltage based on the first biasing voltage control signal; a second actuator configured to generate a second biasing voltage based on a second biasing voltage control signal; and a second controller configured to generate the second biasing voltage control signal based on an intermediate voltage level generated based on the first and second biasing voltages.

Abstract: A transistor biasing circuit including a first controller configured to receive a sensor signal generated based on the performance of one or more transistors of a digital circuit and to compare the sensor signal with a reference signal and to generate a first biasing voltage control signal; a first actuator configured to generate a first biasing voltage based on the first biasing voltage control signal; a second actuator configured to generate a second biasing voltage based on a second biasing voltage control signal; and a second controller configured to generate the second biasing voltage control signal based on an intermediate voltage level generated based on the first and second biasing voltages.

Abstract: A voltage selection circuit, including: first and second nodes of application of first and second input voltages; a third output voltage supply node; first and second MOS transistors respectively coupling the first and third nodes and the second and third nodes; and a control circuit capable of keeping the first and second transistors either respectively on and off or respectively off and on, the control circuit including a feedback loop from the third node to the gate of the first transistor and being capable, during a transition phase, of controlling the first transistor in linear operating region to apply a DC voltage ramp to the third node.

Abstract: An FDSOI reference voltage generation circuit, including a CTAT current generation circuit; a PTAT-type voltage generation circuit including a first branch including first and second series-connected transistors, the front surface gates of the first and second transistors being connected to the conduction node of the second transistor opposite to the first transistor; a third diode-assembled transistor having a conduction node connected to an output node of the PTAT voltage generation circuit and having its other conduction node forming a reference voltage supply node; and a current mirror; wherein the first and second transistors are of LVT type and the third transistor is of RVT type.

Abstract: A voltage selection circuit, including: first and second nodes of application of first and second input voltages; a third output voltage supply node; first and second MOS transistors respectively coupling the first and third nodes and the second and third nodes; and a control circuit capable of keeping the first and second transistors either respectively on and off or respectively off and on, the control circuit including a feedback loop from the third node to the gate of the first transistor and being capable, during a transition phase, of controlling the first transistor in linear operating region to apply a DC voltage ramp to the third node.

Abstract: An FDSOI reference voltage generation circuit, including a CTAT current generation circuit; a PTAT-type voltage generation circuit including a first branch including first and second series-connected transistors, the front surface gates of the first and second transistors being connected to the conduction node of the second transistor opposite to the first transistor; a third diode-assembled transistor having a conduction node connected to an output node of the PTAT voltage generation circuit and having its other conduction node forming a reference voltage supply node; and a current mirror; wherein the first and second transistors are of LVT type and the third transistor is of RVT type.

Abstract: An audio amplifier system (10) is formed to include a voltage reference (16). The voltage reference (16) is formed to utilize a filter having a first cut-off frequency when the output (14) of the voltage reference (16) is less than a first value and to use a second cut-off frequency when the output (14) is greater than the first value.

Abstract: An audio amplifier system (10) is formed to include a voltage reference (16). The voltage reference (16) is formed to utilize a filter having a first cut-off frequency when the output (14) of the voltage reference (16) is less than a first value and to use a second cut-off frequency when the output (14) is greater than the first value.