Patents by Inventor Anthony Renau

Anthony Renau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096602
    Abstract: A system having an auxiliary plasma source, disposed proximate the workpiece, for use with an ion beam is disclosed. The auxiliary plasma source is used to create ions and radicals which drift toward the workpiece and may form a film. The ion beam is then used to provide energy so that the ions and radicals can process the workpiece. Further, various applications of the system are also disclosed. For example, the system can be used for various processes including deposition, implantation, etching, pre-treatment and post-treatment. By locating an auxiliary plasma source close to the workpiece, processes that were previously not possible may be performed. Further, two dissimilar processes, such as cleaning and implanting or implanting and passivating can be performed without removing the workpiece from the end station.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Inventors: Christopher Hatem, Peter F. Kurunczi, Christopher A. Rowland, Joseph C. Olson, Anthony Renau
  • Publication number: 20240029997
    Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Paul J. Murphy, Frank Sinclair, Jun Lu, Daniel Tieger, Anthony Renau
  • Patent number: 11862433
    Abstract: A system having an auxiliary plasma source, disposed proximate the workpiece, for use with an ion beam is disclosed. The auxiliary plasma source is used to create ions and radicals which drift toward the workpiece and may form a film. The ion beam is then used to provide energy so that the ions and radicals can process the workpiece. Further, various applications of the system are also disclosed. For example, the system can be used for various processes including deposition, implantation, etching, pre-treatment and post-treatment. By locating an auxiliary plasma source close to the workpiece, processes that were previously not possible may be performed. Further, two dissimilar processes, such as cleaning and implanting or implanting and passivating can be performed without removing the workpiece from the end station.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: January 2, 2024
    Assignee: Varlan Semiconductor Equipment Associates, Inc.
    Inventors: Christopher Hatem, Peter F. Kurunczi, Christopher A. Rowland, Joseph C. Olson, Anthony Renau
  • Patent number: 11574800
    Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: February 7, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu
  • Patent number: 11569063
    Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: January 31, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Paul J. Murphy, Frank Sinclair, Jun Lu, Daniel Tieger, Anthony Renau
  • Publication number: 20220319806
    Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
    Type: Application
    Filed: April 2, 2021
    Publication date: October 6, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Paul J. Murphy, Frank Sinclair, Jun Lu, Daniel Tieger, Anthony Renau
  • Patent number: 11217427
    Abstract: An apparatus may include a scanner, arranged to receive an ion beam, and arranged to deliver a scan signal, defined by a scan period, to scan the ion beam between a first beamline side and a second beamline side. The apparatus may include a corrector module, disposed downstream of the scanner, and defining a variable path length for the ion beam, between the first beamline side and the second beamline side, wherein a difference in propagation time between a first ion path along the first beamline side and a second ion path along the second beamline side is equal to the scan period.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: January 4, 2022
    Assignee: Applied Materials, Inc.
    Inventor: Anthony Renau
  • Publication number: 20210313154
    Abstract: A system having an auxiliary plasma source, disposed proximate the workpiece, for use with an ion beam is disclosed. The auxiliary plasma source is used to create ions and radicals which drift toward the workpiece and may form a film. The ion beam is then used to provide energy so that the ions and radicals can process the workpiece. Further, various applications of the system are also disclosed. For example, the system can be used for various processes including deposition, implantation, etching, pre-treatment and post-treatment. By locating an auxiliary plasma source close to the workpiece, processes that were previously not possible may be performed. Further, two dissimilar processes, such as cleaning and implanting or implanting and passivating can be performed without removing the workpiece from the end station.
    Type: Application
    Filed: June 14, 2021
    Publication date: October 7, 2021
    Inventors: Christopher Hatem, Peter F. Kurunczi, Christopher A. Rowland, Joseph C. Olson, Anthony Renau
  • Patent number: 11069511
    Abstract: A system having an auxiliary plasma source, disposed proximate the workpiece, for use with an ion beam is disclosed. The auxiliary plasma source is used to create ions and radicals which drift toward the workpiece and may form a film. The ion beam is then used to provide energy so that the ions and radicals can process the workpiece. Further, various applications of the system are also disclosed. For example, the system can be used for various processes including deposition, implantation, etching, pre-treatment and post-treatment. By locating an auxiliary plasma source close to the workpiece, processes that were previously not possible may be performed. Further, two dissimilar processes, such as cleaning and implanting or implanting and passivating can be performed without removing the workpiece from the end station.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: July 20, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Christopher Hatem, Peter F. Kurunczi, Christopher A. Rowland, Joseph C. Olson, Anthony Renau
  • Publication number: 20210166946
    Abstract: A system may include a substrate stage to support a substrate, and a plurality of beam sources. The plurality of beam sources may include an ion beam source, the ion beam source arranged to direct an ion beam to the substrate, and a radical beam source, the radical beam source arranged to direct a radical beam to the substrate. The system may include a controller configured to control the ion beam source and the radical beam source to operate independently of one another, in at least one aspect, wherein the at least one aspect includes beam composition, beam angle of incidence, and relative scanning of a beam source with respect to the substrate.
    Type: Application
    Filed: November 9, 2020
    Publication date: June 3, 2021
    Applicant: APPLIED Materials, Inc.
    Inventors: Anthony Renau, Joseph C. Olson, Peter F. Kurunczi
  • Patent number: 10990014
    Abstract: A method of patterning a substrate may include providing a blanket photoresist layer on the substrate; performing an ion implantation procedure of an implant species into the blanket photoresist layer, the implant species comprising an enhanced absorption efficiency at a wavelength in the extreme ultraviolet (EUV) range; and subsequent to the performing the ion implantation procedure, performing a patterned exposure to expose the blanket photoresist layer to EUV radiation.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 27, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tristan Y. Ma, Huixiong Dai, Anthony Renau, John Hautala, Joseph Olson
  • Patent number: 10930735
    Abstract: A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Min Gyu Sung, Sony Varghese, Anthony Renau, Morgan Evans, Joseph C. Olson
  • Publication number: 20210050349
    Abstract: The present disclosure is directed to structures and processing for three-dimensional transistor devices. In some approaches, a method may include providing a plurality of fin structures formed from a substrate, the plurality of fin structures disposed subjacent to a hard mask layer, and directing angled ions at the plurality of fin structures. The angled ions may form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the angled ions etch the plurality of fin structures to form a stack of isolated nanowires within the plurality of fin structures. The method may further include removing the hard mask layer, and forming a stopping layer over the stack of isolated nanowires.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 18, 2021
    Applicant: APPLIED Materials, Inc.
    Inventors: ANTHONY RENAU, MIN GYU SUNG, SONY VARGHESE, MORGAN EVANS, NAUSHAD K. VARIAM, TASSIE ANDERSEN
  • Patent number: 10903211
    Abstract: The present disclosure is directed to structures and processing for three-dimensional transistor devices. In some approaches, a method may include providing a plurality of fin structures formed from a substrate, the plurality of fin structures disposed subjacent to a hard mask layer, and directing angled ions at the plurality of fin structures. The angled ions may form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the angled ions etch the plurality of fin structures to form a stack of isolated nanowires within the plurality of fin structures. The method may further include removing the hard mask layer, and forming a stopping layer over the stack of isolated nanowires.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: January 26, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Anthony Renau, Min Gyu Sung, Sony Varghese, Morgan Evans, Naushad K. Variam, Tassie Andersen
  • Patent number: 10886279
    Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: January 5, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
  • Publication number: 20200279852
    Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.
    Type: Application
    Filed: May 15, 2020
    Publication date: September 3, 2020
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
  • Publication number: 20200243308
    Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.
    Type: Application
    Filed: April 17, 2020
    Publication date: July 30, 2020
    Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu
  • Patent number: 10692872
    Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 23, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
  • Publication number: 20200185228
    Abstract: A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
    Type: Application
    Filed: February 18, 2020
    Publication date: June 11, 2020
    Applicant: APPLIED Materials, Inc.
    Inventors: Min Gyu Sung, Sony Varghese, Anthony Renau, Morgan Evans, Joseph C. Olson
  • Patent number: 10665433
    Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: May 26, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu