Abstract: This disclosure provides methods and systems of processing a semiconductor wafer. One method includes obtaining wafer characterization metrology information of a wafer, the wafer including a plurality of dies, and generating a plurality of predicted die shapes based on the wafer characterization metrology information being input into a computing model. Each of the plurality of predicated die shapes corresponds to one of the plurality of dies of the wafer. The method further includes processing the wafer to obtain the plurality of dies and processing the plurality of dies based on the plurality of predicated die shapes.

Abstract: A method includes providing a carrier substrate having a die bonded thereto, where the die includes a first alignment mark on a first surface. The method includes positioning a target substrate with a second surface on a substrate stage, where the target substrate includes a second alignment mark on the second surface. The method includes positioning the carrier substrate with respect to a die handler, where the die handler includes a third alignment mark. The method includes coupling the die to the die handler, where the step of coupling includes aligning the first alignment mark with the third alignment mark. The method includes positioning the coupled die and the die handler over the target substrate, where the step of positioning includes aligning the second alignment mark with at least one of the first alignment mark and the third alignment mark. The method includes bonding the first surface with the second surface.

Abstract: Aspects of the present disclosure provide an apparatus that heats a semiconductor structure while holding the semiconductor structure. For example, the apparatus can include a semiconductor structure holding device that is configured to hold the semiconductor structure. The apparatus can also include a heating device that is configured to generate a certain pattern of heat. The heating device can be integrated with the semiconductor structure holding device such that when the semiconductor structure holding device is holding the semiconductor structure, the certain pattern of heat generated by the heating device can be applied to the semiconductor structure.

Abstract: Aspects of the present disclosure provide an apparatus that heats a semiconductor structure while holding the semiconductor structure. For example, the apparatus can include a semiconductor structure holding device that is configured to hold the semiconductor structure. The apparatus can also include a light projection device that is configured to generate a certain pattern of light. The light projection device can be integrated with the semiconductor structure holding device such that when the semiconductor structure holding device is holding the semiconductor structure, the certain pattern of light generated by the light projection device is projected onto the semiconductor structure holding device and a corresponding certain pattern of heat is generated and transferred through the semiconductor structure holding device and applied to the semiconductor structure, in order to correct the shape and size of the semiconductor structure.

Abstract: Aspects of the present disclosure provide a method for correcting distortion of a semiconductor substrate. For example, the method can include receiving a semiconductor substrate with distortion, measuring the semiconductor substrate to identify the distortion in a plurality of positions on the semiconductor substrate, and implanting into the semiconductor substrate a lattice configuration signature according to the identified distortion in the positions such that the identified distortion of the semiconductor substrate is corrected.

Abstract: Aspects of the present disclosure provide a bonding device for bonding two wafers. For example, the bonding device can include a first bonding chuck and a second bonding chuck. The first bonding chuck can have a first bonding head for a first wafer to be mounted thereon. The second bonding chuck can have a plurality of second bonding heads for a second wafer to be mounted thereon. The second bonding heads can be controlled individually to apply local pressures onto the second wafer to move the second wafer toward the first wafer to bond the second wafer to the first wafer, the local pressures corresponding to bow measurement of the first wafer and the second wafer.

Abstract: Aspects of the present disclosure provide a method for correcting an overlay error by shifting lithographic patterns to be formed on a wafer according to a bow measurement of the wafer. For example, the method can include receiving a first location at which one or more first semiconductor elements are to be formed on a first wafer, measuring the first wafer to identify a first bow measurement of the first wafer, calculating a second location that is shifted from the first location based on the first bow measurement, and forming the first semiconductor elements on the first wafer at the second location.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: Aspects of the present disclosure provide a bonding device for bonding two wafers. For example, the bonding device can include a first bonding chuck and a second bonding chuck. The first bonding chuck can have a first bonding head for a first wafer to be mounted thereon. The second bonding chuck can have a plurality of second bonding heads for a second wafer to be mounted thereon. The second bonding heads can be controlled individually to apply local pressures onto the second wafer to move the second wafer toward the first wafer to bond the second wafer to the first wafer, the local pressures corresponding to bow measurement of the first wafer and the second wafer.

Abstract: A method includes providing a carrier substrate having a die bonded thereto, where the die includes a first alignment mark on a first surface. The method includes positioning a target substrate with a second surface on a substrate stage, where the target substrate includes a second alignment mark on the second surface. The method includes positioning the carrier substrate with respect to a die handler, where the die handler includes a third alignment mark. The method includes coupling the die to the die handler, where the step of coupling includes aligning the first alignment mark with the third alignment mark. The method includes positioning the coupled die and the die handler over the target substrate, where the step of positioning includes aligning the second alignment mark with at least one of the first alignment mark and the third alignment mark. The method includes bonding the first surface with the second surface.

Abstract: A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique wiring structure having a unique electrical signature.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique wiring structure having a unique electrical signature.

Abstract: A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique wiring structure having a unique electrical signature.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique identifier.

Abstract: A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique wiring structure having a unique electrical signature.

Abstract: A high shear rotating disc filter having a hollow interior and constructed of a porous material such as sintered metal or ceramic with finely structured openings. The disc is mounted and secured onto a hollow shaft. The hollow shaft is connected to a vacuum source, external to the filter, that allows for the passage of the filtrate to a receiver. There are elongated slots in the wall of the shaft which provide the passage of filtrate from the disc. The shaft provides rotational force for the discs.

Abstract: A bearing with shallow grooves on the surface of the rolling element. In addition, pockets of lubricant are carried in its own internal structure via a network of through-holes crossing at its center which release lubricant to the grooves and surface of the rolling element upon the rotation of the bearing assembly.