Patents by Inventor Anthony W. Leigh

Anthony W. Leigh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5963779
    Abstract: Integrated circuit architectures and methods of operation are provided that allow for the connection of a negative back-gate bias voltage to substrate contacts 24, 90, and 56 during burn-in operations. Accordingly, latch up conditions are prevented during burn-in operations when a circuit is especially vulnerable to such conditions and a grounded substrate is provided to allow for the most efficient operation of the circuit during normal conditions.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: October 5, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Anthony W. Leigh, Joe W. McPherson, Kenan J. Dickerson
  • Patent number: 5007022
    Abstract: A DRAM array having a number of two-port cells (10) arranged to permit the simultaneous read and write operations of different cells within the array. Each column of the array includes a refresh circuit (40) which is responsive to a four-phase clock for carrying out refresh operations which are transparent to the programmer. When used in microcomputer applications having four-phase clocks, the DRAM array of the invention functions similar to a static RAM, in that refresh is automatically undertaken.
    Type: Grant
    Filed: November 9, 1989
    Date of Patent: April 9, 1991
    Assignee: Texas Instruments Incorporated
    Inventor: Anthony W. Leigh