Abstract: Storage devices are presented which have some facility of error indication and error correction. The basic idea of the present invention is to double only the storing part inside the storing cell and share the environmental logic. Especially in case of multi-port cells this reduces the area penalty significantly because the read/write control within the cell is shared and only placed once. Writing the cell always writes both latches so that they hold the same data. A soft error can flip only one of the two latches. Then, a ‘XOR’ block detects that the data is no longer identical. While the data is read out the check bit indicates that the data is corrupted. The approach of doubling only the storing elements can be extended to implement a triple storing element (10, 12, 30) in the same cell. Then, with the help of a small and simple error correction logic (32) in the cell from a ‘majority vote’ can be seen which bit value is wrong in case of a soft error affecting one bit in the cell.

Abstract: A method and system for operating a high frequency outprocessor with increased pipeline length. A new scheme is disclosed to reduce the pipeline by the detection and exploitation of so called “no_dependency” for an instruction. A “no dependency” signal tells that all required source data is available for the instruction at least one cycle before the source data valid bit(s) are inserted into the issue queue. Therefore, one or more stages of the pipeline are bypassed. Bypassing the pipeline stages for this “no dependency” conditions is especially important since a no dependency is found when the queue is empty. Furthermore, this bypass is very effective when the queue is relatively empty. Therefore, introducing such a bypass reduces effectively the performance drawback of a longer pipeline.

Abstract: A storage device and a method for determining the entry with the highest priority in a buffer memory. The method is characterized by the steps of operating a plurality of priority subfilter circuits each of them covering a disjunct subgroup of the total of entries and each selecting the entry with the highest subgroup priority, and selecting the entry associated with the highest priority subgroup. The storage device is able to be allocated and deallocated repeatedly during processing program instructions in a computer system. The storage device is further characterized by an operator for operating a plurality of priority subfilter circuits. Each of priority subfilter circuits covers a disjunct subgroup of the total of entries and each selecting the entry with the highest subgroup priority. The storage device is still further characterized by a selector for selecting the entry associated with the highest priority subgroup.