Abstract: A memory cell arrangement is provided that may include: at least one memory cell and a read-out circuit. The memory cell includes a first terminal, a second terminal, a third terminal, and a field-effect transistor structure being connected to the first terminal, the second terminal, and the third terminal. The read-out circuit is configured to carry out a read-out operation to read out a memory state of the memory cell, the read-out operation including: providing a first voltage at the first terminal, a second voltage at the second terminal, and a third voltage at the third terminal such that the field-effect transistor structure is in a high-resistivity state and such that a leakage current through the first terminal and/or through the second terminal is generated, and sensing the leakage current to determine the memory state of the memory element.

Abstract: A memory cell of the one-time-programmable type is programmed by application of a programming voltage having a value sufficient to obtain a breakdown of a dielectric of a capacitor within the cell. A programming circuit generates the programming voltage as a variable voltage that varies as a function of a temperature (T) of the cell. In particular, the programming voltage varies based on a variation law decreasing as a function of the temperature.