Abstract: A computerized method of filtering a dataset for processing is presented. The method starts with receiving a dataset with a plurality of data records. Afterwards, an estimation module determines selection estimation values for the data records, based on which subsequently pass-through probabilities are determined by a pass-through function. The method further comprises generating a subset of data records by discarding at least a portion of the dataset based on the pass-through probabilities. The subset of data records is then processed and one or more data records are selected. Finally, weights and labels are assigned to the data records of the subset of data records for updating the estimation module and the pass-through function.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.

Abstract: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.

Abstract: Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Abstract: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.

Abstract: Eyewear is disclosed that can have multiple ventilation states providing different amounts of ventilation through the eyewear. The eyewear can include a lens and a frame. In some embodiments, the lens can be movable with respect to the frame to provide the multiple ventilation states. In some embodiments, the eyewear can include a gasket that removably attaches to the frame. In some embodiments, the gasket can be movable with respect to the frame to provide the multiple ventilation states.