Patents by Inventor Antone Kusmanoff

Antone Kusmanoff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reconfigurable networked processing elements partial differential equations system
    Patent number: 8583720
    Abstract: A method for using a system to compute a solution to a partial differential equation (PDE) broadly comprises the steps of determining the true accuracy required (TAR) to solve the PDE, determining an architecture according to the TAR that performs a plurality of calculations to solve the PDE, determining a time allowed (TA) and a time required (TR) based on the architecture to solve the PDE, rejecting the PDE if the TR is less than or equal to the TA, configuring a plurality of programmable devices with the architecture, initiating the calculations, and ceasing the calculations when an accuracy criteria is met or when the TA expires. The system broadly comprises a plurality of programmable devices, a plurality of storage elements, a device bus, a plurality of printed circuit (PC) boards, and a board to board bus.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: November 12, 2013
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventors: Antone Kusmanoff, Matthew P. DeLaquil, Deepak Prasanna, Jerry W. Yancey
  • RECONFIGURABLE NETWORKED PROCESSING ELEMENTS PARTIAL DIFFERENTIAL EQUATIONS SYSTEM
    Publication number: 20110196907
    Abstract: A method for using a system to compute a solution to a partial differential equation (PDE) broadly comprises the steps of determining the true accuracy required (TAR) to solve the PDE, determining an architecture according to the TAR that performs a plurality of calculations to solve the PDE, determining a time allowed (TA) and a time required (TR) based on the architecture to solve the PDE, rejecting the PDE if the TR is less than or equal to the TA, configuring a plurality of programmable devices with the architecture, initiating the calculations, and ceasing the calculations when an accuracy criteria is met or when the TA expires. The system broadly comprises a plurality of programmable devices, a plurality of storage elements, a device bus, a plurality of printed circuit (PC) boards, and a board to board bus.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 11, 2011
    Applicant: L3 COMMUNICATIONS INTEGRATED SYSTEMS, L.P.
    Inventors: Antone Kusmanoff, Matthew P. DeLaquil, Deepak Prasanna, Jerry W. Yancey