Patents by Inventor Antonio A. Lagana

Antonio A. Lagana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070163754
    Abstract: The invention relates to an improved thermosiphon and to a method for transferring heat. The thermosiphon has a higher efficiency than existing thermosiphons because it does not rely on a pool-boiling evaporator but rather uses a forced-convection boiling evaporator. The inlet of the evaporator is located in its upper portion and is in fluid communication with a condenser. The fluid in its liquid phase enters the evaporator from its inlet in its upper portion and, by gravity, flows down the piping network of the evaporator, clinging on the inner surface of the tubes of the piping network. As the liquid flows down, it evaporates such that the fluid at the bottom of the evaporator is predominantly in a gaseous phase. The fluid in gaseous phase is then returned to the condenser.
    Type: Application
    Filed: January 19, 2006
    Publication date: July 19, 2007
    Inventors: Jean-Pierre Dionne, Antonio Lagana
  • Patent number: 5410669
    Abstract: A data processing system (10) having a dual purpose memory (14) comprising multiple cache sets. Each cache set can be individually configured as either a cache set or as a static random access memory (SRAM) bank. Based upon the configuration of the set, the tag store array (58) is used for storage of actual data, in the SRAM mode, or for storage of a set of tag entries in the cache mode. A module configuration register (40) specifies the mode of each set/bank. A set of base address registers (41-44) define the upper bits of a base address of SRAM banks. In SRAM mode, comparison logic (66) compares a tag field of the requested address (50) to the base address to determine an access hit. The least significant bit of the address, tag field is used to select either the tag store array (58) or the line array (60) for the requested address data read or write.
    Type: Grant
    Filed: April 5, 1993
    Date of Patent: April 25, 1995
    Assignee: Motorola, Inc.
    Inventors: Terry L. Biggs, Antonio A. Lagana