Patents by Inventor Antonio Aldarese

Antonio Aldarese has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Nonvolatile memory controller and method for erase suspend management that increments the number of program and erase cycles after erase suspend
    Patent number: 10152273
    Abstract: A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for incrementing the number of program and erase cycles when the erase-suspend limit has been reached.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 11, 2018
    Assignee: IP GEM GROUP, LLC
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna
  • NONVOLATILE MEMORY CONTROLLER AND METHOD FOR ERASE SUSPEND MANAGEMENT THAT INCREMENTS THE NUMBER OF PROGRAM AND ERASE CYCLES AFTER ERASE SUSPEND
    Publication number: 20180081589
    Abstract: A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for incrementing the number of program and erase cycles when the erase-suspend limit has been reached.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 22, 2018
    Applicant: IP GEM GROUP, LLC
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna
  • Method and apparatus with program suspend using test mode
    Patent number: 9892794
    Abstract: A nonvolatile memory controller is disclosed that includes a read circuit configured to read memory cells of a nonvolatile memory device and a program and erase circuit configured to program and erase memory cells of the nonvolatile memory device. The nonvolatile memory controller includes a NAND shared algorithm circuit configured to communicate with the nonvolatile memory device so as to enter a test mode of the nonvolatile memory device and configured to modify the trim registers while the nonvolatile memory device is in the test mode such that the nonvolatile memory device performs one or more operations. The operations may include a suspendable program operation, a program suspend operation and an erase suspend operation.
    Type: Grant
    Filed: January 2, 2017
    Date of Patent: February 13, 2018
    Assignee: IP GEM GROUP, LLC
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna
  • Nonvolatile memory system with erase suspend circuit and method for erase suspend management
    Patent number: 9886214
    Abstract: A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for preventing subsequent suspends of the erase operation when the erase-suspend limit has been reached.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: February 6, 2018
    Assignee: IP GEM GROUP, LLC
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna
  • NONVOLATILE MEMORY SYSTEM WITH SHARED ALGORITHM MODE
    Publication number: 20170194053
    Abstract: A nonvolatile memory controller is disclosed that includes a read circuit configured to read memory cells of a nonvolatile memory device and a program and erase circuit configured to program and erase memory cells of the nonvolatile memory device. The nonvolatile memory controller includes a NAND shared algorithm circuit configured to communicate with the nonvolatile memory device so as to enter a test mode of the nonvolatile memory device and configured to modify the trim registers while the nonvolatile memory device is in the test mode such that the nonvolatile memory device performs one or more operations. The operations may include a suspendable program operation, a program suspend operation and an erase suspend operation.
    Type: Application
    Filed: January 2, 2017
    Publication date: July 6, 2017
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna
  • NONVOLATILE MEMORY SYSTEM WITH ERASE SUSPEND CIRCUIT AND METHOD FOR ERASE SUSPEND MANAGEMENT
    Publication number: 20170168752
    Abstract: A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for preventing subsequent suspends of the erase operation when the erase-suspend limit has been reached.
    Type: Application
    Filed: December 6, 2016
    Publication date: June 15, 2017
    Inventors: Rino Micheloni, Antonio Aldarese, Salvatrice Scommegna