Abstract: Disclosed herein is a pseudomorphic high electron mobility transistor (PHEMT) power device (1) including a semi-insulating substrate (2); an epitaxial substrate (3) formed on the semi-insulating substrate (2) a contact layer (19). The contact layer (19) includes a lightly doped contact layer (20) formed on the Schottky layer (18), and a highly doped contact layer (21) formed on the lightly doped contact layer (20) and having a doping concentration higher than the lightly doped contact layer (20). The PHEMT power device (1) further includes a—wide recess (23) formed to penetrate the highly doped contact layer (21) and a narrow recess (24) formed in the wide recess (23) to penetrate the lightly doped contact layer (20). The gate electrode (6) is formed in the narrow recess (24) and in Schottky contact with the Schottky layer (18).

Abstract: Disclosed herein is a pseudomorphic high electron mobility transistor (PHEMT) power device (1) including a semi-insulating substrate (2); an epitaxial substrate (3) formed on the semi-insulating substrate (2) a contact layer (19). The contact layer (19) includes a lightly doped contact layer (20) formed on the Schottky layer (18), and a highly doped contact layer (21) formed on the lightly doped contact layer (20) and having a doping concentration higher than the lightly doped contact layer (20). The PHEMT power device (1) further includes a—wide recess (23) formed to penetrate the highly doped contact layer (21) and a narrow recess (24) formed in the wide recess (23) to penetrate the lightly doped contact layer (20). The gate electrode (6) is formed in the narrow recess (24) and in Schottky contact with the Schottky layer (18).

Abstract: A technique utilizing conventional photolithography to manufacture GaAs MESFET devices having sub-micrometric gate and variable length recessed channel. The structure of these devices consists of two photopolymeric layers separated by a metal interface. The upper, stencil layer sets the aperture of the submicrometric gate. The lower planarizing layer defines the recessed channel, through the metal interface, which acts as a template. The length of such channel may be varied through suitable choice of exposure time of the planarizing photopolymer. By adopting such multilayer structures it is possible to obtain gate lengths of .about.b .mu.m and recessed channel lengths form 0.8 to 3 .mu.m, with a process yield typically better than 90%, simultaneously. Furthermore, by using a thicker planarizing layer in this structure it is possible to obtain a relatively thick metal deposit (typically about 0.8 .mu.m), such as a Ti/Pt/Au overlayer over ohmic contacts and gate pads.

Abstract: A method of making semiconductive developments, especially MESFETs, which applies a template to a surface of the substrate previously formed with circuit elements in alignment with these elements and so bonds the template to the substrate that the template can be utilized as a holder for the substrate. The rear surface is then coated with a resist and a second template aligned externally with the first utilizing markings exterior to the substrate to form the structure on the rear surface which can include throughholes for a metal deposit extending through the preferably GaAs substrate.

Abstract: A method of making a field effect transistor with a modified metal semiconductor Schottky barrier depletion region wherein a GaAs semiconductive active layer on a semiinsulating substrate is supplied with a pair of ohmic contacts and with a gate or barrier electrode between the ohmic contacts and spaced therefrom so that below the surface of the active layer upon which the barrier electrode and ohmic contacts are supplied, an electron-depletion region is formed between each ohmic contact and the gate or barrier electrode. According to the invention, this surface region is treated by bombardment with nitrogen or by the application of a layer thereto to modify the depth of the depletion region so that this depth beneath the treated surface region will differ from that beneath the gate or barrier electrode.

Abstract: In order to provide a semiconductive substrate such as gallium arsenide with an oxide layer, the substrate is positively biased in a plasma reactor in which an oxidizing gas is ionized by radiofrequency excitation while the substrate is heated to an elevated temperature increasing its conductivity. The substrate may be placed for this purpose on a graphite pedestal which is inductively heated from the same radiofrequency source.