Abstract: A method and system for measuring overlay in a semiconductor manufacturing process comprise capturing an image of a feature in an article at a predetermined manufacturing stage, deriving a quantity of an image parameter from the image and converting the quantity into an overlay measurement. The conversion is by reference to an image parameter quantity derived from a reference image of a feature at the same predetermined manufacturing stage with known overlay (“OVL”). There is also disclosed a method of determining a device inspection recipe for use by an inspection tool comprising identifying device patterns as candidate device care areas that may be sensitive to OVL, deriving an OVL response for each identified pattern, correlating the OVL response with measured OVL, and selecting some or all of the device patterns as device care areas based on the correlation.

Abstract: A method and system for measuring overlay in a semiconductor manufacturing process comprise capturing an image of a feature in an article at a predetermined manufacturing stage, deriving a quantity of an image parameter from the image and converting the quantity into an overlay measurement. The conversion is by reference to an image parameter quantity derived from a reference image of a feature at the same predetermined manufacturing stage with known overlay (“OVL”). There is also disclosed a method of determining a device inspection recipe for use by an inspection tool comprising identifying device patterns as candidate device care areas that may be sensitive to OVL, deriving an OVL response for each identified pattern, correlating the OVL response with measured OVL, and selecting some or all of the device patterns as device care areas based on the correlation.

Abstract: A method and system for measuring overlay in a semiconductor manufacturing process comprise capturing an image of a feature in an article at a predetermined manufacturing stage, deriving a quantity of an image parameter from the image and converting the quantity into an overlay measurement. The conversion is by reference to an image parameter quantity derived from a reference image of a feature at the same predetermined manufacturing stage with known overlay (“OVL”). There is also disclosed a method of determining a device inspection recipe for use by an inspection tool comprising identifying device patterns as candidate device care areas that may be sensitive to OVL, deriving an OVL response for each identified pattern, correlating the OVL response with measured OVL, and selecting some or all of the device patterns as device care areas based on the correlation.

Abstract: Methods and systems fir identifying nuisances and defects of interest (DOIs) in defects detected on a wafer are provided. One method includes acquiring metrology data for the wafer generated by a metrology tool that performs measurements on the wafer at an array of measurement points. In one embodiment, the measurement points are determined prior to detecting the defects on the wafer and independently of the defects detected on the wafer. The method also includes determining locations of defects detected on the wafer with respect to locations of the measurement points on the wafer and assigning metrology data to the defects as a defect attribute based on the locations of the defects determined with respect to the locations of the measurement points. In addition, the method includes determining if the defects are nuisances or DOIs based on the defect attributes assigned to the defects.

Abstract: Information from metrology tools can be used during inspection or review with a scanning electron microscope. Metrology measurements of a wafer are interpolated and/or extrapolated over a field, which creates modified metrology data. The modified metrology data is associated with defect attributes from inspection measurements of a wafer. A wafer review sampling plan is generated based on the defect attributes and the modified metrology data. The wafer review sampling plan can be used during review of a wafer using the scanning electron microscope.

Abstract: A method and system for measuring overlay in a semiconductor manufacturing process comprise capturing an image of a feature in an article at a predetermined manufacturing stage, deriving a quantity of an image parameter from the image and converting the quantity into an overlay measurement. The conversion is by reference to an image parameter quantity derived from a reference image of a feature at the same predetermined manufacturing stage with known overlay (“OVL”). There is also disclosed a method of determining a device inspection recipe for use by an inspection tool comprising identifying device patterns as candidate device care areas that may be sensitive to OVL, deriving an OVL response for each identified pattern, correlating the OVL response with measured OVL, and selecting some or all of the device patterns as device care areas based on the correlation.

Abstract: Methods and systems fir identifying nuisances and defects of interest (DOIs) in defects detected on a wafer are provided. One method includes acquiring metrology data for the wafer generated by a metrology tool that performs measurements on the wafer at an array of measurement points. In one embodiment, the measurement points are determined prior to detecting the defects on the wafer and independently of the defects detected on the wafer. The method also includes determining locations of defects detected on the wafer with respect to locations of the measurement points on the wafer and assigning metrology data to the defects as a defect attribute based on the locations of the defects determined with respect to the locations of the measurement points. In addition, the method includes determining if the defects are nuisances or DOIs based on the defect attributes assigned to the defects.

Abstract: Information from metrology tools can be used during inspection or review with a scanning electron microscope. Metrology measurements of a wafer are interpolated and/or extrapolated over a field, which creates modified metrology data. The modified metrology data is associated with defect attributes from inspection measurements of a wafer. A wafer review sampling plan is generated based on the defect attributes and the modified metrology data. The wafer review sampling plan can be used during review of a wafer using the scanning electron microscope.

Abstract: The invention relates to a plastics laminate in particular for vehicle glazing. The composite is composed of at least three layers, where the two exterior layers are composed of a transparent polymethyl (meth)acrylate (PMMA) and the internal layer is composed of a thermoplastic polyurethane (TPU). The plastics laminate passes the ECE R43 falling-ball test and has better acoustic properties than prior-art plastics composites of the same size.

Abstract: The present invention relates to a process for producing coated mouldings with fully or partly structured surfaces. The present invention additionally describes a system for performing this process.

Abstract: The present invention relates to weathering-resistant, colored moldings made of poly(alkyl)(meth)acrylate with improved gloss and resistance to mechanical influences acting on the surface of the molding, in particular with improved wipe resistance and improved scratch resistance, and also to molding compositions for producing the same.

Abstract: The present invention relates to weathering-resistant, colored moldings made of poly(alkyl) (meth)acrylate with improved gloss and resistance to mechanical influences acting on the surface of the molding, in particular with improved wipe resistance and improved scratch resistance, and also to molding compositions for producing the same.

Abstract: The present invention relates to a process for producing coated mouldings with fully or partly structured surfaces. The present invention additionally describes a system for performing this process.