Abstract: Embodiments of a method and system are disclosed. One embodiment of a method for signaling an interrupt in an I2C system that includes a master I2C device and at least one slave I2C device that are connected by an SDA line and an SCL line is disclosed. The method involves, at the slave I2C device, pulling the SDA line low to signal an interrupt and at the slave I2C device, releasing the SDA line in response to either the SCL line having been pulled low or the expiration of a predetermined time period, whichever occurs first. In an embodiment, the predetermined time period is 1 ms.

Abstract: Line cards receive control packets and perform a hierarchical rate limiting on those control packets. A set of identifier keys are extracted from the control packets and the protocol of those control packets are determined. At a first level, the control packets are rate limited per unique set of identifier keys per protocol. Those packets which fail the first rate limiting level are dropped. Those packets which pass the first rate limiting level are rate limited at a second level per protocol type. Those packets which fail the second level rate limiting are dropped while those packets which pass the second level rate limiting are sent to the control card for further processing.

Abstract: A network node includes a primary incoming interface, a secondary incoming interface and a data flow control unit. The primary incoming interface is operable to receive traffic associated with a particular source and multicast group. The secondary incoming interface is operable to serve as a backup interface if the primary incoming interface or a transmission path coupled to the primary incoming interface is inoperative. The data flow control unit is operable to determine whether the network node is part of a ring topology and if so, forward traffic received on the primary incoming interface associated with the source and multicast group to both a host which joined the multicast group and the secondary incoming interface and forward traffic received on the secondary incoming interface associated with the source and multicast group to the primary incoming interface.

Abstract: A method is provided to formally verify a property of a circuit design comprising: receiving a description of at least a portion of the circuit; receiving an indication of search accuracy criteria; receiving a description of a relationship between current and voltage (I-V relationship) for one or more of devices of the circuit; converting each I-V relationship to a conservative approximation of such I-V relationship; assigning voltage labels to one or more terminals of one or more identified devices that indicate voltage relationships among the one or more terminals consistent with KVL; defining a respective current relationship among one or more respective sets of currents of the one or more of the identified devices that is consistent with KCL; searching for one or more combinations of current and voltage values that are within at least one region of each conservative approximation and that are consistent with the voltage labels and that are consistent with each respective defined current relationship; conv

Abstract: Line cards receive control packets and perform a hierarchical rate limiting on those control packets. A set of identifier keys are extracted from the control packets and the protocol of those control packets are determined. At a first level, the control packets are rate limited per unique set of identifier keys per protocol. Those packets which fail the first rate limiting level are dropped. Those packets which pass the first rate limiting level are rate limited at a second level per protocol type. Those packets which fail the second level rate limiting are dropped while those packets which pass the second level rate limiting are sent to the control card for further processing.

Abstract: Line cards receive control packets and perform a hierarchical rate limiting on those control packets. A set of identifier keys are extracted from the control packets and the protocol of those control packets are determined. At a first level, the control packets are rate limited per unique set of identifier keys per protocol. Those packets which fail the first rate limiting level are dropped. Those packets which pass the first rate limiting level are rate limited at a second level per protocol type. Those packets which fail the second level rate limiting are dropped while those packets which pass the second level rate limiting are sent to the control card for further processing.

Abstract: A network node includes a primary incoming interface, a secondary incoming interface and a data flow control unit. The primary incoming interface is operable to receive traffic associated with a particular source and multicast group. The secondary incoming interface is operable to serve as a backup interface if the primary incoming interface or a transmission path coupled to the primary incoming interface is inoperative. The data flow control unit is operable to determine whether the network node is part of a ring topology and if so, forward traffic received on the primary incoming interface associated with the source and multicast group to both a host which joined the multicast group and the secondary incoming interface and forward traffic received on the secondary incoming interface associated with the source and multicast group to the primary incoming interface.

Abstract: Line cards receive control packets and perform a hierarchical rate limiting on those control packets. A set of identifier keys are extracted from the control packets and the protocol of those control packets are determined. At a first level, the control packets are rate limited per unique set of identifier keys per protocol. Those packets which fail the first rate limiting level are dropped. Those packets which pass the first rate limiting level are rate limited at a second level per protocol type. Those packets which fail the second level rate limiting are dropped while those packets which pass the second level rate limiting are sent to the control card for further processing.

Abstract: Disclosed are methods, systems, and computer program products for computing an exact minimal automaton to act as an intermediate assertion in assume-guarantee reasoning. In one embodiment, the computing an exact minimal automaton is performed by using a sampling approach and a Boolean satisfiability. The methods described herein may be used as part of a tool for formal verification.

Abstract: This disclosure teaches a method of Boolean satisfiability checking (SAT) for a circuit. The method comprises identifying inactive clauses in the conjunctive normal form (CNF) of the circuit and removing the inactive clauses from the CNF.

Abstract: This disclosure teaches a method of Boolean satisfiability checking (SAT) for a circuit. The method comprises identifying inactive clauses in the conjunctive normal (CNF) of the circuit and removing the inactive clauses from the CNF.