Patents by Inventor Anuj B. Gosalia
Anuj B. Gosalia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160259671Abstract: Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.Type: ApplicationFiled: March 7, 2016Publication date: September 8, 2016Inventors: Anuj B. Gosalia, Steve Pronovost
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Patent number: 9324299Abstract: Atlasing and virtual surface techniques are described. In one or more implementations, virtual surface functionality is exposed by an operating system for access by one or more applications of the computing device. A virtual surface is created in response to a request from the one or more applications to be used to render visuals for display by a display device. The virtual surface is allocated in memory of the computing device by the exposed virtual surface functionality to have an area that is larger than an area to be used to display the visuals from the one or more applications.Type: GrantFiled: September 9, 2011Date of Patent: April 26, 2016Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.Inventors: Leonardo E. Blanco, Silvana Patricia Moncayo, Hang Li, Mary Luo, Imran Majid, Joshua Warren Priestley, Benjamin C. Constable, Anuj B. Gosalia, Aleksandar Antonijevic, Daniel N. Wood, Max McMullen
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Patent number: 9298498Abstract: Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.Type: GrantFiled: July 14, 2008Date of Patent: March 29, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Anuj B. Gosalia, Steve Pronovost
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Patent number: 8671411Abstract: Systems and methods are provided for scheduling the processing of a coprocessor whereby applications can submit tasks to a scheduler, and the scheduler can determine how much processing each application is entitled to as well as an order for processing. In connection with this process, tasks that require processing can be stored in physical memory or in virtual memory that is managed by a memory manager. The invention also provides various techniques of determining whether a particular task is ready for processing. A “run list” may be employed to ensure that the coprocessor does not waste time between tasks or after an interruption. The invention also provides techniques for ensuring the security of a computer system, by not allowing applications to modify portions of memory that are integral to maintaining the proper functioning of system operations.Type: GrantFiled: January 15, 2010Date of Patent: March 11, 2014Assignee: Microsoft CorporationInventors: Anuj B. Gosalia, Steve Pronovost
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Publication number: 20130067502Abstract: Atlasing and virtual surface techniques are described. In one or more implementations, virtual surface functionality is exposed by an operating system for access by one or more applications of the computing device. A virtual surface is created in response to a request from the one or more applications to be used to render visuals for display by a display device. The virtual surface is allocated in memory of the computing device by the exposed virtual surface functionality to have an area that is larger than an area to be used to display the visuals from the one or more applications.Type: ApplicationFiled: September 9, 2011Publication date: March 14, 2013Applicant: Microsoft CorporationInventors: Leonardo E. Blanco, Silvana Patricia Moncayo, Hang Li, Mary Luo, Imran Majid, Joshua Warren Priestley, Benjamin C. Constable, Anuj B. Gosalia, Aleksandar Antonijevic, Daniel N. Wood, Max McMullen
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Patent number: 7830387Abstract: Systems and methods that independently control divided and/or isolated processing resources of a Graphical Processing Unit (GPU). Synchronization primitives for processing are shared among such resources to process interaction with the engines and their associated different requirements (e.g. different language). Accordingly, independent threads can be created against particular nodes (e.g., a video engine node, 3D engine node), wherein multiple engines can exist under a single node, and independent control can subsequently be exerted upon the plurality of engines associated with the GPU.Type: GrantFiled: November 7, 2006Date of Patent: November 9, 2010Assignee: Microsoft CorporationInventors: Steve Pronovost, Anuj B. Gosalia, Ameet Arun Chitre
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Publication number: 20100122259Abstract: Systems and methods are provided for scheduling the processing of a coprocessor whereby applications can submit tasks to a scheduler, and the scheduler can determine how much processing each application is entitled to as well as an order for processing. In connection with this process, tasks that require processing can be stored in physical memory or in virtual memory that is managed by a memory manager. The invention also provides various techniques of determining whether a particular task is ready for processing. A “run list” may be employed to ensure that the coprocessor does not waste time between tasks or after an interruption. The invention also provides techniques for ensuring the security of a computer system, by not allowing applications to modify portions of memory that are integral to maintaining the proper functioning of system operations.Type: ApplicationFiled: January 15, 2010Publication date: May 13, 2010Applicant: Microsoft CorporationInventors: Anuj B. Gosalia, Steve Pronovost
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Patent number: 7683906Abstract: Video frame buffers are controlled using a sequence of new-frame-indicators (e.g., FLIP) and no-new-frame-indicators (e.g., NOFLIP) in a frame indicator queue that is accessed with each display refresh. Video samples are loaded into a chain of video frame buffers that is “rotated” during the vertical blanking signal of the display to swap an old frame buffer out for a new frame buffer. The rotations of the frame buffer chain are controlled based on the frame indicators in the frame indicator queue to present new video samples to the display in a regular pattern, thereby providing smooth video playback.Type: GrantFiled: February 22, 2006Date of Patent: March 23, 2010Assignee: Microsoft CorporationInventors: Jay Senior, Stephen J. Estrop, Anuj B. Gosalia, David R. Blythe, Joseph C. Ballantyne, Kan Qiu, Gregory D. Swedberg, John (Mingtzong) Lee
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Patent number: 7673304Abstract: Systems and methods are provided for scheduling the processing of a coprocessor whereby applications can submit tasks to a scheduler, and the scheduler can determine how much processing each application is entitled to as well as an order for processing. In connection with this process, tasks that require processing can be stored in physical memory or in virtual memory that is managed by a memory manager. The invention also provides various techniques of determining whether a particular task is ready for processing. A “run list” may be employed to ensure that the coprocessor does not waste time between tasks or after an interruption. The invention also provides techniques for ensuring the security of a computer system, by not allowing applications to modify portions of memory that are integral to maintaining the proper functioning of system operations.Type: GrantFiled: January 22, 2004Date of Patent: March 2, 2010Assignee: Microsoft CorporationInventors: Anuj B. Gosalia, Steve Pronovost
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Publication number: 20080301687Abstract: Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.Type: ApplicationFiled: July 14, 2008Publication date: December 4, 2008Applicant: Microsoft CorporationInventors: Anuj B. Gosalia, Steve Pronovost
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Patent number: 7444637Abstract: Systems and methods for scheduling coprocessing resources in a computing system are provided without redesigning the coprocessor. In various embodiments, a system of preemptive multitasking is provided achieving benefits over cooperative multitasking by any one or more of (1) executing rendering commands sent to the coprocessor in a different order than they were submitted by applications; (2) preempting the coprocessor during scheduling of non-interruptible hardware; (3) allowing user mode drivers to build work items using command buffers in a way that does not compromise security; (4) preparing DMA buffers for execution while the coprocessor is busy executing a previously prepared DMA buffer; (5) resuming interrupted DMA buffers; and (6) reducing the amount of memory needed to run translated DMA buffers.Type: GrantFiled: February 12, 2004Date of Patent: October 28, 2008Assignee: Microsoft CorporationInventors: Steve Pronovost, Anuj B. Gosalia, Bryan L. Langley, Hideyuki Nagase
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Patent number: 7421694Abstract: Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.Type: GrantFiled: January 22, 2004Date of Patent: September 2, 2008Assignee: Microsoft CorporationInventors: Anuj B. Gosalia, Steve Pronovost
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Publication number: 20080109810Abstract: Systems and methods that independently control divided and/or isolated processing resources of a Graphical Processing Unit (GPU). Synchronization primitives for processing are shared among such resources to process interaction with the engines and their associated different requirements (e.g. different language). Accordingly, independent threads can be created against particular nodes (e.g., a video engine node, 3D engine node), wherein multiple engines can exist under a single node, and independent control can subsequently be exerted upon the plurality of engines associated with the GPU.Type: ApplicationFiled: November 7, 2006Publication date: May 8, 2008Applicant: MICROSOFT CORPORATIONInventors: Steve Pronovost, Anuj B. Gosalia, Ameet Arun Chitre
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Patent number: 7088367Abstract: Complex computer graphics forms and motions can be constructed either by hand or with motion or geometry capture technologies, once they are created, they are difficult to modify, particularly at runtime. Interpolation provides a way to leverage artist-generated source material. Methodologies for efficient runtime interpolation between multiple forms or multiple motion segments enables computers to perform more realistic animation in real-time. Shape interpolation is applied to predefined figures to create smoothly skinned figures that deform in natural ways. Predefined figures are selected using a search technique that reduces the amount of interpolation required to produce real-time animation.Type: GrantFiled: November 22, 2004Date of Patent: August 8, 2006Assignee: Microsoft CorporationInventors: Charles N. Boyd, David John Martin, Anuj B. Gosalia, David Floyd Aronson
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Patent number: 7064762Abstract: Complex computer graphics forms and motions can be constructed either by hand or with motion or geometry capture technologies, once they are created, they are difficult to modify, particularly at runtime. Interpolation provides a way to leverage artist-generated source material. Methodologies for efficient runtime interpolation between multiple forms or multiple motion segments enables computers to perform more realistic animation in real-time. Shape interpolation is applied to predefined figures to create smoothly skinned figures that deform in natural ways. Predefined figures are selected using a search technique that reduces the amount of interpolation required to produce real-time animation.Type: GrantFiled: November 2, 2004Date of Patent: June 20, 2006Assignee: Microsoft CorporationInventors: Charles N. Boyd, David John Martin, Anuj B. Gosalia, David Floyd Aronson
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Patent number: 7057619Abstract: Complex computer graphics forms and motions can be constructed either by hand or with motion or geometry capture technologies, once they are created, they are difficult to modify, particularly at runtime. Interpolation provides a way to leverage artist-generated source material. Methodologies for efficient runtime interpolation between multiple forms or multiple motion segments enables computers to perform more realistic animation in real-time. Shape interpolation is applied to predefined figures to create smoothly skinned figures that deform in natural ways. Predefined figures are selected using a search technique that reduces the amount of interpolation required to produce real-time animation.Type: GrantFiled: November 4, 2004Date of Patent: June 6, 2006Assignee: Microsoft CorporationInventors: Charles N. Boyd, David John Martin, Anuj B. Gosalia, David Floyd Aronson
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Patent number: 6992668Abstract: An API is provided to automatically transition data objects or containers between memory types to enable the seamless switching of data. The switching of data containers from one location to another is performed automatically by the API. Thus, polygon or pixel data objects are automatically transitioned between memory types such that the switching is seamless. It appears to a developer as if the data chunks/containers last forever, whereas in reality, the API hides the fact that the data is being transitioned to optimize system performance. The API hides an optimal cache managing algorithm from the developer so that the developer need not be concerned with the optimal tradeoff of system resources, and so that efficient switching of data can take place ‘behind the scenes’, thereby simplifying the developer's task. Data containers are thus efficiently placed in storage to maximize data processing rates and storage space, whether a data container is newly created or switched from one location to another.Type: GrantFiled: October 26, 2004Date of Patent: January 31, 2006Assignee: Microsoft CorporationInventors: Anuj B. Gosalia, Jeff M. J. Noyle, Michael A. Toelle
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Patent number: 6839062Abstract: Usage semantics allow for shaders to be authored independently of the actual vertex data and accordingly enables their reuse. Usage semantics define a feature that binds data between distinct components to allow them to work together. In various embodiments, the components include high level language variables that are bound by an application or by vertex data streams, high level language fragments to enable several fragments to be developed separately and compiled at a later time together to form a single shader, assembly language variables that get bound to vertex data streams, and parameters between vertex and pixel shaders. This allows developers to be able to program the shaders in the assembly and high level language with variables that refer to names rather than registers. By allowing this decoupling of registers from the language, developers can work on the language separately from the vertex data and modify and enhance high level language shaders without having to manually manipulate the registers.Type: GrantFiled: February 24, 2003Date of Patent: January 4, 2005Assignee: Microsoft CorporationInventors: David F. Aronson, Amar Patel, Anantha R. Kancheria, Anuj B. Gosalia, Craig Peeper, Daniel K. Baker, Iouri Tarassov, Loren McQuade
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Patent number: 6822653Abstract: Complex computer graphics forms and motions can be constructed either by hand or with motion or geometry capture technologies, once they are created, they are difficult to modify, particularly at runtime. Interpolation provides a way to leverage artist-generated source material. Methodologies for efficient runtime interpolation between multiple forms or multiple motion segments enables computers to perform more realistic animation in real-time. Shape interpolation is applied to predefined figures to create smoothly skinned figures that deform in natural ways. Predefined figures are selected using a search technique that reduces the amount of interpolation required to produce real-time animation.Type: GrantFiled: June 28, 2002Date of Patent: November 23, 2004Assignee: Microsoft CorporationInventors: Charles N. Boyd, David John Martin, Anuj B. Gosalia, David Floyd Aronson
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Patent number: 6812923Abstract: An API is provided to automatically transition data objects or containers between memory types to enable the seamless switching of data. The switching of data containers from one location to another is performed automatically by the API. Thus, polygon or pixel data objects are automatically transitioned between memory types such that the switching is seamless. It appears to a developer as if the data chunks/containers last forever, whereas in reality, the API hides the fact that the data is being transitioned to optimize system performance. The API hides an optimal cache managing algorithm from the developer so that the developer need not be concerned with the optimal tradeoff of system resources, and so that efficient switching of data can take place ‘behind the scenes’, thereby simplifying the developer's task.Type: GrantFiled: March 1, 2001Date of Patent: November 2, 2004Assignee: Microsoft CorporationInventors: Anuj B. Gosalia, Jeff M. J. Noyle, Michael A. Toelle