Abstract: A method for compensating for transistor aging in a display device is presented. The method entails dividing pixels into a plurality of groups including a first group, the first group including Z pixels wherein Z>1, sampling a pixel current for each pixel in a subset of pixels in the first group, the subset including M pixels wherein 1?M?Z, determining an ErrorM using the sampled pixel current for the M pixels and a predefined reference current, and adjusting an input voltage for a transistor in more than one of the Z pixels based on the ErrorM. The adjusting of the input voltage may include generating a modified voltage Vd, wherein Vd=A*Vin+B, and each of A and B is determined using ?M sign(Errorm).

Abstract: A method for compensating for transistor aging in a display device is presented. The method entails dividing pixels into a plurality of groups including a first group, the first group including Z pixels wherein Z>1, sampling a pixel current for each pixel in a subset of pixels in the first group, the subset including M pixels wherein 1?M?Z, determining an ErrorM using the sampled pixel current for the M pixels and a predefined reference current, and adjusting an input voltage for a transistor in more than one of the Z pixels based on the ErrorM. The adjusting of the input voltage may include generating a modified voltage Vd, wherein Vd=A*Vin+B, and each of A and B is determined using ?M sign(Errorm).

Abstract: Systems and methods for on-chip signaling are disclosed. In some embodiments, an integrated circuit having on-chip signaling between a first component and a second component includes, a differential interconnect capable of coupling the first component to the second component, a driver capable of being coupled to the first component that sends data on the differential interconnect, a receiver capable of being coupled to the second component that receives the data, and a plurality of negative impedance converters capable of being coupled to the differential interconnect that provide loss compensation.

Abstract: Spectrum analyzer circuits and methods are provided which implement “zero-IF” (direct conversion) or “near-zero IF” (or very low IF) architectures that enable implementation of integrated (on-chip) spectrum analyzers for measuring the frequency spectrum of internal chip signals. An integrated spectrum analyzer circuit, which comprises a zero IF or near-zero IF framework, enables a low-power compact design with sufficient resolution bandwidth for on-chip implementation and diagnostics of internal chip signals.

Abstract: Spectrum analyzer circuits and methods are provided which implement “zero-IF” (direct conversion) or “near-zero IF” (or very low IF) architectures that enable implementation of integrated (on-chip) spectrum analyzers for measuring the frequency spectrum of internal chip signals. An integrated spectrum analyzer circuit, which comprises a zero IF or near-zero IF framework, enables a low-power compact design with sufficient resolution bandwidth for on-chip implementation and diagnostics of internal chip signals.