Abstract: A method for copying data from a storage device that has been identified for replacement or has failed to a spare storage device. The method includes a storage controller tracking input/output statistics for several storage devices. The storage controller determines if a first storage device storing first data has been identified for replacement within the storage devices. In response to the first storage device having been identified for replacement, a first least written to data address space within the first storage device is determined based on the input/output statistics. First data contained in the first least written to data address space is copied from the first storage device to the spare storage device.

Abstract: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area.

Abstract: The present invention relates to novel spiro-oxazine analogues of Formula-I and Indolinone compounds of Formula-II or positional isomers, or stereoisomers, or derivatives, or pharmaceutically acceptable salt thereof. Formula-I Formula-II Further the invention provides transition-metal free multicomponent reaction (MCR) process for the preparation of said compounds of Formula-I and II using aryne precursor, N-substituted isatin and N-heteroaromatic compound as the nucleophile, under mild condition leading to formation of desired complex of spiro-oxazine analogues (I) and indolinone analogues (II) in high yield and selectivity.

Abstract: Methods and apparatus to audibly provide messages in a mobile device at described. An example method includes detecting a radio link failure condition, in response to detecting the radio link failure condition, sending a cell update message to a medium access control of the user equipment, detecting that a timer associated with a radio access bearer has expired before receiving confirmation from the medium access control of transmission of the cell update message to a network, and in response to detecting that the timer associated with the radio access bearer has expired and sending the cell update message to the medium access control, maintaining the radio access bearer associated with the timer.

Abstract: A semiconductor power device supported on a semiconductor substrate comprising a plurality of transistor cells each having a source and a drain with a gate to control an electric current transmitted between the source and the drain. The semiconductor further includes a gate-to-drain (GD) clamp termination connected in series between the gate and the drain further includes a plurality of back-to-back polysilicon diodes connected in series to a silicon diode includes parallel doped columns in the semiconductor substrate wherein the parallel doped columns having a predefined gap. The doped columns further include a U-shaped bend column connect together the ends of parallel doped columns with a deep doped-well that is disposed below and engulfing the U-shaped bend.

Abstract: Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a SoC/NoC that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the SoC/NoC to generate and execute power profile management instructions for different segments or regions of the SoC/NoC for efficient and safe working thereof.

Abstract: A system that incorporates teachings of the present disclosure may include, for example, a communication device having a controller to retrieve from an address book a communication identifier for each of a plurality of participants, determine from the address book a conferencing type for each of the plurality of participants, and initiate according to the conference type and the communication identifier of each participant a Voice over Internet Protocol conference call directed to communication devices of the plurality of participants. Other embodiments are disclosed.

Abstract: Dynamic linking of pathway maps and cell maps is disclosed in certain embodiments. In such embodiments, the pathway maps are linked to spatially-localized regional nucleic acid data (e.g., sequence data), as opposed to non-spatially selected nucleic acid data. The pathway map and cell map data may be linked so that interactions results in changes or updates to the linked map, such as the selection or highlighting of cells exhibiting pathway map characteristics specified by a user of updating of node values or states to correspond to that of a cell or cells selected by the user.

Abstract: A semiconductor device includes a first substrate that has a sensing portion that detects predetermined information, a second substrate that has a first processing portion that processes data supplied thereto from the sensing portion, and a third substrate having a second processing portion that processes data supplied thereto either from the first substrate or from the second substrate.

Abstract: A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero-junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer. The power device further comprises a source electrode and a drain electrode disposed on two opposite sides of a gate electrode disposed on top of the hetero-junction structure for controlling a current flow between the source and drain electrodes in the 2DEG layer.

Abstract: Semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In one embodiment, a method for forming a semiconductor device includes forming a first epitaxial layer on sidewalls of trenches and forming second epitaxial layer on the first epitaxial layer where charges in the doped regions along the sidewalls of the first and second trenches achieve charge balance in operation. In another embodiment, the semiconductor device includes a termination structure including an array of termination cells.

Abstract: A method and apparatus can be configured to receive a first scheduling request. The first scheduling request corresponds to a request for a first access point to process data. The method can also include transmitting a second scheduling request. The second scheduling request corresponds to a request to transmit data to a second access point. The transmitting the second scheduling request comprises transmitting the second scheduling request before the data is processed at the first access point.

Abstract: Processor(s) for detecting malicious software. A hardware virtual machine monitor (HVMM) operates under a host OS. Container(s) initialized with network application template(s) operate under a guest OS VM. A detection module operates under the guest OS VM includes a trigger detection module, a logging module and a container command module. The trigger detection module monitors activity on container(s) for a trigger event. The logging module writes activity report(s) in response to trigger event(s). The container command module issues command(s) in response to trigger event(s). The command(s) include a container start, stop and revert commands. A virtual machine control console operates under the host OS and starts/stops the HVMM. A container control module operates under the guest OSVM and controls container(s) in response to the command(s). The server communication module sends activity report(s) to a central collection network appliance that maintains a repository of activities for infected devices.

Abstract: A method and apparatus for reading bitcell data stored in a content addressable memory (CAM) includes controlling a first compare line of a first column of an array of bitcells to a first logic state while controlling a second compare line of the first column as well as first and second compare lines of each of the other columns of the array to a second logic state during a second mode of operation, in order to provide the bitcell data stored in at least one bitcell of the first column to a respective match line. The method also includes reading the bitcell data on the respective match line.

Abstract: An image sensor includes pixels that accumulate charge during a first integration period and pixels that accumulate charge during shorter second integration periods when an image is captured. The pixels having the shorter second integration period accumulate charge at two or more different times during the first integration period. Charge is read out of the pixels associated with the first integration period at the end of the first integration period, while charge is read out of the pixels having the second integration period at the end of each second integration period.

Abstract: This invention discloses an insulated gate bipolar transistor (IGBT) device formed in a semiconductor substrate. The IGBT device has a split-shielded trench gate that includes an upper gate segment and a lower shield segment. The IGBT device may further include a dummy trench filled with a dielectric layer disposed at a distance away from the split-shielded trench gate. The IGBT device further includes a body region extended between the split-shielded trench gate and the dummy trench encompassing a source region surrounding the split-shielded trench gate near a top surface of the semiconductor substrate. The IGBT device further includes a heavily doped N region disposed below the body region and above a source-dopant drift region above a bottom body-dopant collector region at a bottom surface of the semiconductor substrate. In an alternative embodiment, the IGBT may include a planar gate with a trench shield electrode.

Abstract: Systems and methods of the present disclosure relate to automatically and/or dynamically generating one or more power management sequences for SoC and NoC architectures from a given input specification having one or a combination of NoC design specification, traffic specification, traffic profile, power profile information, initiator-consumer relationship, interdependency between components, retention information, external factors, among other allied configurations/information to enable efficient switching of one or more hardware elements from one power profile to another.

Abstract: Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a SoC/NoC that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the SoC/NoC to generate and execute power profile management instructions for different segments or regions of the SoC/NoC for efficient and safe working thereof.

Abstract: Embodiments of fluid distribution manifolds, cartridges, and microfluidic systems are described herein. Fluid distribution manifolds may include an insert member and a manifold base and may define a substantially closed channel within the manifold when the insert member is press-fit into the base. Cartridges described herein may allow for simultaneous electrical and fluidic interconnection with an electrical multiplex board and may be held in place using magnetic attraction.

Abstract: A sensing device includes a first array of sensing elements, which output a signal indicative of a time of incidence of a single photon on the sensing element. A second array of processing circuits are coupled respectively to the sensing elements and comprise a gating generator, which variably sets a start time of the gating interval for each sensing element within each acquisition period, and a memory, which records the time of incidence of the single photon on each sensing element in each acquisition period. A controller controls the gating generator during a first sequence of the acquisition periods so as to sweep the gating interval over the acquisition periods and to identify a respective detection window for the sensing element, and during a second sequence of the acquisition periods, to fix the gating interval for each sensing element to coincide with the respective detection window.