Patents by Inventor Anupam Singal

Anupam Singal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System, method, and computer program product for testbench coverage
    Patent number: 10031991
    Abstract: The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include receiving an electronic design environment including both a design under test (“DUT”) and a testbench. Embodiments may further include simulating an electronic design associated with the electronic design environment and generating a coverage database associated with the electronic design. Embodiments may include performing coverage analysis of the DUT and testbench using an automated inheritance aware analysis and applying the coverage analysis results to the testbench after simulation.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: July 24, 2018
    Assignee: Cadence Design Systems, Inc.
    Inventors: Praveen Kumar Chhabra, Hemant Gupta, Sharad Gaur, Matthew Aaron Graham, John Laurence Rose, Anupam Singal
  • Method of transitioning between active mode and power-down mode in processor based system
    Patent number: 7725750
    Abstract: A method of transitioning between an active mode and a power-down mode in a processor-based system includes saving a state of the active mode, detecting the occurrence of one or more interrupt events during a transition between the active mode and the power-down mode, and responding to the detected interrupt events.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: May 25, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mathur Ashish, Vikas Ahuja, Batmanabhan Purushothaman, Anupam Singal, Meenakshi Vasisht
  • METHOD OF TRANSITIONING BETWEEN ACTIVE MODE AND POWER-DOWN MODE IN PROCESSOR BASED SYSTEM
    Publication number: 20070260794
    Abstract: A method of transitioning between an active mode and a power-down mode in a processor-based system includes saving a state of the active mode, detecting the occurrence of one or more interrupt events during a transition between the active mode and the power-down mode, and responding to the detected interrupt events.
    Type: Application
    Filed: April 23, 2007
    Publication date: November 8, 2007
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mathur Ashish, Vikas Ahuja, Batmanabhan Purushothaman, Anupam Singal, Meenakshi Vasisht