Patents by Inventor Anupama Padminidevi Karthikeyan Nair

Anupama Padminidevi Karthikeyan Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus, system, and method for increased current distribution on high-density circuit boards
    Patent number: 11605602
    Abstract: The disclosed current-distribution inductor may include (1) a magnetic core and (2) a conductor electrically coupled between a power source and an electrical component of a circuit board, wherein the conductor comprises (A) a bend that passes through the magnetic core and (B) a flying lead that extends from the bend to the electrical component of the circuit board and runs parallel with the circuit board. Various other apparatuses, systems, and methods are also disclosed.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: March 14, 2023
    Assignee: Juniper Networks, Inc.
    Inventors: Marshall J. Lise, Anupama Padminidevi Karthikeyan Nair, David K. Owen
  • APPARATUS, SYSTEM, AND METHOD FOR INCREASED CURRENT DISTRIBUTION ON HIGH-DENSITY CIRCUIT BOARDS
    Publication number: 20210219418
    Abstract: The disclosed current-distribution inductor may include (1) a magnetic core and (2) a conductor electrically coupled between a power source and an electrical component of a circuit board, wherein the conductor comprises (A) a bend that passes through the magnetic core and (B) a flying lead that extends from the bend to the electrical component of the circuit board and runs parallel with the circuit board. Various other apparatuses, systems, and methods are also disclosed.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 15, 2021
    Inventors: Marshall J. Lise, Anupama Padminidevi Karthikeyan Nair, David K. Owen
  • Apparatus, systems and methods for detecting electrical failures within computing devices
    Patent number: 10732691
    Abstract: The disclosed method may include (1) monitoring, while a computing device receives power from an external power supply, (A) the amount of power consumed by the computing device and (B) the amount of power provided to the computing device by the external power supply, (2) detecting that the amount of power provided to the computing device exceeds the amount of power consumed by the computing device by at least a certain threshold, (3) determining, based on the amount of power provided to the computing device exceeding the amount of power consumed by the computing device by the certain threshold, that the computing device is experiencing a malfunction, and then (4) mitigating potential damage to the computing device due to the malfunction by at least partially reducing the amount of power provided to the computing device from the external power supply. Various other apparatuses, systems, and methods are disclosed.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: August 4, 2020
    Assignee: Juniper Networks, Inc
    Inventors: Franklin D. Boyden, David K. Owen, Anupama Padminidevi Karthikeyan Nair, Jaspal S. Gill, Katsuhiro Okamura, Michael D. Savini
  • APPARATUS, SYSTEMS AND METHODS FOR DETECTING ELECTRICAL FAILURES WITHIN COMPUTING DEVICES
    Publication number: 20200073458
    Abstract: The disclosed method may include (1) monitoring, while a computing device receives power from an external power supply, (A) the amount of power consumed by the computing device and (B) the amount of power provided to the computing device by the external power supply, (2) detecting that the amount of power provided to the computing device exceeds the amount of power consumed by the computing device by at least a certain threshold, (3) determining, based on the amount of power provided to the computing device exceeding the amount of power consumed by the computing device by the certain threshold, that the computing device is experiencing a malfunction, and then (4) mitigating potential damage to the computing device due to the malfunction by at least partially reducing the amount of power provided to the computing device from the external power supply. Various other apparatuses, systems, and methods are disclosed.
    Type: Application
    Filed: August 31, 2018
    Publication date: March 5, 2020
    Inventors: Franklin D. Boyden, David K. Owen, Anupama Padminidevi Karthikeyan Nair, Jaspal S. Gill, Katsuhiro Okamura, Michael D. Savini