Patents by Inventor Anurag Agrawal

Anurag Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220299743
    Abstract: An imaging target for characterization of an optical system has a structure, formed on a substrate, wherein the structure has a base level and has one or more staging surfaces spaced apart from the base level and disposed over a range of distances from the base level; and one or more localized light sources disposed along the one or more staging surfaces of the structure and configured to direct light through or from the structure.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 22, 2022
    Inventors: Anurag Agrawal, Scott Gaumer, Warren Colomb
  • Patent number: 11444889
    Abstract: Some embodiments provide a network forwarding element with a data-plane forwarding circuit that has a parameter collecting circuit to store and distribute parameter values computed by several machines in a network. In some embodiments, the machines perform distributed computing operations, and the parameter values that compute are parameter values associated with the distributed computing operations. The parameter collecting circuit of the data-plane forwarding circuit (data plane) in some embodiments (1) stores a set of parameter values computed and sent by a first set of machines, and (2) distributes the collected parameter values to a second set of machines once it has collected the set of parameter values from all the machines in the first set. The first and second sets of machines are the same set of machines in some embodiments, while they are different sets of machines (e.g., one set has at least one machine that is not in the other set) in other embodiments.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: September 13, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Masoud Moshref Javadi, Changhoon Kim, Patrick W. Bosshart, Anurag Agrawal
  • Patent number: 11354245
    Abstract: Systems and methods for prefetching content items for display by applications executed on computing devices are provided. The method can include transmitting a first request for content to display within an environment of the application, the first request for content including a first parameter to be used to determine a first content item for display; storing in an associated memory element, the first parameter; transmitting a follow-on request for content including the first parameter of the first request for content; receiving a follow-on content item responsive to the follow-on request for content; storing the follow-on content item in a local cache structure specific to the application; transmitting a second request for content; retrieving, in response to the second request, the follow-on content item from the local cache structure; and displaying, in response to the second request, the follow-on content item within the environment of the application on the computing device.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: June 7, 2022
    Assignee: GOOGLE LLC
    Inventors: Anton Kast, William Coster, Anurag Agrawal
  • Patent number: 11347040
    Abstract: An imaging target for characterization of an optical system has a structure, formed on a substrate, wherein the structure has a base level and has one or more staging surfaces spaced apart from the base level and disposed over a range of distances from the base level; and one or more localized light sources disposed along the one or more staging surfaces of the structure and configured to direct light through or from the structure.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: May 31, 2022
    Assignee: Double Helix Optics Inc.
    Inventors: Anurag Agrawal, Scott Gaumer, Warren Colomb
  • Patent number: 11349781
    Abstract: Some embodiments provide novel circuits for recording data messages received by a data plane circuit of a forwarding element in an external memory outside of the data plane circuit. The external memory in some embodiments is outside of the forwarding element. In some embodiments, the data plane circuit encapsulates the received data messages that should be recorded with encapsulation headers, inserts into these headers addresses that identify locations for storing these data messages in a memory external to the data plane circuit, and forwards these encapsulated data messages so that these messages can be stored in the external memory by another circuit. Instead of encapsulating received data messages for storage, the data plane circuit in some embodiments encapsulates copies of the received data messages for storage. Accordingly, in these embodiments, the data plane circuit makes copies of the data messages that it needs to record.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: May 31, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Antonin Mathieu Bas, Anurag Agrawal, Changhoon Kim
  • Patent number: 11322117
    Abstract: Systems and methods for cropping media for a particular orientation using a computing device are described. In some implementations, a method may first comprise receiving by a video preprocessor of the device, a first frame of media in a first orientation. A first region comprising a first feature within the first frame may be identified, by an image analyzer. A cropping calculator of the device may generate a score for the first region based on a characteristic of the first feature and determine that the score for the first region exceeds a threshold. An image processor of the device may then crop the first frame of the video, responsive to the determination that the score for the first region exceeds the threshold, to include the first region within a predetermined display area comprising a subset of the first frame in a second orientation.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: May 3, 2022
    Assignee: GOOGLE LLC
    Inventors: Anton Kast, Anurag Agrawal
  • Publication number: 20220109639
    Abstract: Examples described herein relate to a network interface device comprising a multi-stage programmable packet processing pipeline circuitry to determine a path to transmit a packet based on relative network traffic transmitted via multiple paths. In some examples, determine a path to transmit a packet is based on Deficit Round Robin (DRR). In some examples, the programmable packet processing pipeline circuitry includes: a first stage to manage two or more paths, wherein a path of the two or more paths of the first stage is associated with two or more child nodes, a second stage to manage two or more paths, wherein a path of the two or more paths of the second stage is associated with two or more child nodes, and at least one child node is associated with the determined path.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 7, 2022
    Inventors: Anurag AGRAWAL, John Andrew FINGERHUT, Xiaoyan DING, Song ZHANG
  • Publication number: 20220109587
    Abstract: Examples described herein relate to a switch circuitry that includes circuitry to cause transmission, to multiple destinations, of copies of a packet received from a sender network interface device and circuitry to indicate acknowledgement of packet receipt, from the multiple destinations, to the sender network interface device based on receipt of acknowledgements of packet receipt from the multiple destinations. In some examples, the circuitry is to indicate acknowledgement of packet receipt, from the multiple destinations, to the sender network interface device with a packet index value.
    Type: Application
    Filed: December 16, 2021
    Publication date: April 7, 2022
    Inventors: Amedeo SAPIO, Daniel A. ALVAREZ, Anurag AGRAWAL
  • Patent number: 11271869
    Abstract: A method of multicasting packets by a forwarding element that includes several packet replicators and several egress pipelines. Each packet replicator receives a data structure associated with a multicast packet that identifies a multicast group. Each packet replicator identifies a first physical egress port of a first egress pipeline for sending the multicast packet to a member of the multicast group. The first physical egress port is a member of LAG. Each packet replicator determines that the first physical egress port is not operational and identifies a second physical port in the LAG for sending the multicast packet to the member of the multicast group. When a packet replicator is connected to the same egress pipeline as the second physical egress, the packet replicator provides the identification of the second physical egress port to the egress pipeline to send the packet to the multicast member. Otherwise the packet replicator drops the packet.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: March 8, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Anurag Agrawal, Julianne Zhu
  • Patent number: 11258703
    Abstract: Some embodiments provide a data-plane forwarding circuit that can be configured to learn about a new message flow and to maintain metadata about the new message flow without first having a control plane first configure the data plane to maintain metadata about the flow. To perform its forwarding operations, the data plane includes several data message processing stages that are configured to process the data tuples associated with the data messages received by the data plane. In some embodiments, parts of the data plane message-processing stages are also configured to operate as a flow-tracking circuit that includes (1) a flow-identifying circuit to identify message flows received by the data plane, and (2) a first set of storages to store metadata about the identified flows.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: February 22, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Steven Licking, Jeongkeun Lee, Patrick Bosshart, Anurag Agrawal, Michael Gregory Ferrara, Jay Evan Scott Peterson
  • Patent number: 11250464
    Abstract: Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium for dynamic contact information assignment. A method includes: identifying a pool of telephone numbers; assigning the telephone numbers to a pool manager; allocating by the pool manager, subsets of the telephone numbers to a plurality of allocators, each allocator responsible for allocating telephone numbers to an associated group of content sponsors; determining a first allocation of a first subset, the first allocation being distributed among the content sponsors associated with a first allocator, creating first pools each associated with a respective one of the content sponsors associated with the first allocator; reclaiming one or more telephone numbers from a pool of the first pools; and assigning ones of the reclaimed telephone numbers by the first allocator into either other pools of the first pools or back to the pool manager for allocation to other allocators.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: February 15, 2022
    Assignee: Google LLC
    Inventors: Anurag Agrawal, Girish Baliga, Anshul Kothari, Seung Yi, Tao Huang
  • Patent number: 11245572
    Abstract: Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: February 8, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Xiaozhou Li, Anurag Agrawal, Julianne Zhu
  • Patent number: 11223520
    Abstract: Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: January 11, 2022
    Assignee: Intel Corporation
    Inventors: Changhoon Kim, Xiaozhou Li, Anurag Agrawal, Julianne Zhu
  • Publication number: 20210399998
    Abstract: Some embodiments use one or more FPGAs and external memories associated with the FPGAs to implement large, hash-addressable tables for a data plane circuit. These embodiments configure at least one message processing stage of the DP circuit to store (1) a first plurality of records for matching with a set of data messages received by the DP circuit, and (2) a redirection record redirecting data messages that do not match the first plurality of records to a DP egress port associated with the memory circuit. These embodiments configure an external memory circuit to store a larger, second set of records for matching with redirected data messages received through the DP egress port associated with the memory circuit. This external memory circuit is a hash-addressable memory in some embodiments.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: Antonin Mathieu BAS, Anurag AGRAWAL, Changhoon KIM
  • Publication number: 20210399997
    Abstract: Some embodiments provide a network forwarding element with a data-plane forwarding circuit that has a parameter collecting circuit to store and distribute parameter values computed by several machines in a network. In some embodiments, the machines perform distributed computing operations, and the parameter values that compute are parameter values associated with the distributed computing operations. The parameter collecting circuit of the data-plane forwarding circuit (data plane) in some embodiments (1) stores a set of parameter values computed and sent by a first set of machines, and (2) distributes the collected parameter values to a second set of machines once it has collected the set of parameter values from all the machines in the first set. The first and second sets of machines are the same set of machines in some embodiments, while they are different sets of machines (e.g., one set has at least one machine that is not in the other set) in other embodiments.
    Type: Application
    Filed: April 2, 2021
    Publication date: December 23, 2021
    Inventors: Masoud Moshref JAVADI, Changhoon KIM, Patrick W. Bosshart, Anurag AGRAWAL
  • Publication number: 20210328930
    Abstract: Examples described herein relate to an apparatus that includes a network interface device comprising circuitry to identify at least one congested queue, predict occupancy level of the at least one congested queue when at least one sender is predicted to receive at least one congestion notification and transmit the at least one congestion notification to the at least one sender through zero or more intermediate nodes. In some examples, to identify at least one congested queue, the circuitry is to identify the at least one congested queue based on at least one fill level. In some examples, to identify at least one congested queue, the circuitry is to identify the at least one congested queue based on at least one predicted fill level at a predicted time the at least one sender receives the at least one congestion notification.
    Type: Application
    Filed: June 26, 2021
    Publication date: October 21, 2021
    Inventors: Georgios NIKOLAIDIS, Jeremias BLENDIN, Changhoon KIM, Junggun LEE, Rong PAN, Anurag AGRAWAL, Yi LI
  • Patent number: 11151073
    Abstract: Some embodiments use one or more FPGAs and external memories associated with the FPGAs to implement large, hash-addressable tables for a data plane circuit. These embodiments configure at least one message processing stage of the DP circuit to store (1) a first plurality of records for matching with a set of data messages received by the DP circuit, and (2) a redirection record redirecting data messages that do not match the first plurality of records to a DP egress port associated with the memory circuit. These embodiments configure an external memory circuit to store a larger, second set of records for matching with redirected data messages received through the DP egress port associated with the memory circuit. This external memory circuit is a hash-addressable memory in some embodiments.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: October 19, 2021
    Assignee: Barefoot Networks, Inc.
    Inventors: Antonin Mathieu Bas, Anurag Agrawal, Changhoon Kim
  • Patent number: 11134032
    Abstract: Some embodiments use one or more FPGAs and external memories associated with the FPGAs to implement large, hash-addressable tables for a data plane circuit. These embodiments configure at least one message processing stage of the DP circuit to store (1) a first plurality of records for matching with a set of data messages received by the DP circuit, and (2) a redirection record redirecting data messages that do not match the first plurality of records to a DP egress port associated with the memory circuit. These embodiments configure an external memory circuit to store a larger, second set of records for matching with redirected data messages received through the DP egress port associated with the memory circuit. This external memory circuit is a hash-addressable memory in some embodiments.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: September 28, 2021
    Assignee: Barefoot Networks, Inc.
    Inventors: Antonin Mathieu Bas, Anurag Agrawal, Changhoon Kim
  • Patent number: 11122139
    Abstract: A method of reducing download requirements for display of content includes transmitting, by a client device to a content server, a content request, the request including an identifier for each of one or more pre-cached media files stored on the client device, the transmission being carried out whilst the client device is connected to a first network. The method further includes receiving, by the client device from the content server, a response comprising instructions to display a selected one of the pre-cached media files, the response including additional display instructions for display of the selected pre-cached media file, and displaying, by the client device, the pre-cached media file according to the additional display instructions.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: September 14, 2021
    Assignee: GOOGLE LLC
    Inventors: William Coster, Anurag Agrawal
  • Publication number: 20210266219
    Abstract: Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
    Type: Application
    Filed: May 12, 2021
    Publication date: August 26, 2021
    Applicant: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Xiaozhou Li, Anurag Agrawal, Julianne Zhu