Patents by Inventor ANURAG SARAN

ANURAG SARAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure
    Patent number: 11256837
    Abstract: Disclosed are methods, systems, and articles of manufacture for implementing an electronic design with high-capacity design closure. A reduced netlist may be generated for an analysis view of an electronic design based at least in part upon logic of interest in the analysis view. A closure may be performed based at least in part upon a union netlist, wherein the union netlist is generated from the reduced netlist. The electronic design may then be implemented based at least in part upon a result of the closure task.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: February 22, 2022
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sourav Kumar Sircar, Marc Heyberger, Manish Garg, Akash Khandelwal, Chunlong Pan, Ruchir Agarwal, Anurag Saran, Lalit Bharat, Namrata M Sadhankar, Manish Bhatia, Renuka Deshpande
  • Method and system for planogram compliance check based on visual analysis
    Patent number: 10885493
    Abstract: A method and system is provided for planogram compliance check based on visual analysis. The present method and system comprises acquiring a product shelf image, identifying a region of interest (ROI) from the at least one product shelf image, extracting a perspective distortion rectification of the identified ROI to generate a rectified shelf image, applying Hausdroff distance based image map for occupancy estimation in shelf images extracting one or more rows from the rectified shelf image wherein the rectified shelf image comprises a plurality of horizontal row partitions, and deriving a product count and placement information for each of the extracted one or more rows based on the extracted rows and the occupancy estimation.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 5, 2021
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Ehtesham Hassan, Anurag Saran, Preeti Johri, Shilpa Yadukumar Rao
  • METHOD AND SYSTEM FOR PLANOGRAM COMPLIANCE CHECK BASED ON VISUAL ANALYSIS
    Publication number: 20160335590
    Abstract: A method and system is provided for planogram compliance check based on visual analysis. The present method and system comprises acquiring a product shelf image, identifying a region of interest (ROI) from the at least one product shelf image, extracting a perspective distortion rectification of the identified ROI to generate a rectified shelf image, applying Hausdroff distance based image map for occupancy estimation in shelf images extracting one or more rows from the rectified shelf image wherein the rectified shelf image comprises a plurality of horizontal row partitions, and deriving a product count and placement information for each of the extracted one or more rows based on the extracted rows and the occupancy estimation.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 17, 2016
    Applicant: Tata Consultancy Services Limited
    Inventors: EHTESHAM HASSAN, ANURAG SARAN, PREETI JOHRI, SHILPA YADUKUMAR RAO