Patents by Inventor Anurupa Rajkumari

Anurupa Rajkumari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8151147
    Abstract: In accordance with at least some embodiments, a system comprises a plurality of partitions, each partition having its own error handler. The system further comprises a plurality of resources assignable to the plurality of partitions. The system further comprises management logic coupled to the plurality of partitions and the plurality of resources. The management logic comprises an error management tool that synchronizes operation of the error handlers in response to an error.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: April 3, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anurupa Rajkumari, Andrew C. Walton, Howard Calkin
  • Patent number: 8122290
    Abstract: A system for error log consolidation is disclosed herein. A server computer includes a plurality of system processors and error log consolidation logic. The system processors are configurable to form isolated execution partitions. The error log consolidation logic is configured to, based on detection of a fault in the server, retrieve error logs from the system processors, and to consolidate the retrieved logs with server computer information not available to the system processors to generate a consolidated error log. The consolidated error log includes a comprehensive set of server information relevant to identifying a cause of the detected fault.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: February 21, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew C. Walton, Howard Calkin, Anurupa Rajkumari
  • Patent number: 8108724
    Abstract: A system and method for fault management in a computer-based system are disclosed herein. A system includes a plurality of field replaceable units (“FRUs”) and fault management logic. The fault management logic is configured to collect error information from a plurality of components of the system. The logic stores, for each component identified as a possible cause of a detected fault, a record assigning one of two different component failure probability indications. The logic identifies a single of the plurality of FRUs that has failed based on the stored probability indications.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: January 31, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey A. Barlow, Howard Calkin, Andrew C. Walton, Anurupa Rajkumari
  • Publication number: 20110154097
    Abstract: A system and method for fault management in a computer-based system are disclosed herein. A system includes a plurality of field replaceable units (“FRUs”) and fault management logic. The fault management logic is configured to collect error information from a plurality of components of the system. The logic stores, for each component identified as a possible cause of a detected fault, a record assigning one of two different component failure probability indications. The logic identifies a single of the plurality of FRUs that has failed based on the stored probability indications.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Inventors: Jeffrey A. BARLOW, Howard Calkin, Andrew C. Walton, Anurupa Rajkumari
  • Publication number: 20110154128
    Abstract: In accordance with at least some embodiments, a system comprises a plurality of partitions, each partition having its own error handler. The system further comprises a plurality of resources assignable to the plurality of partitions. The system further comprises management logic coupled to the plurality of partitions and the plurality of resources. The management logic comprises an error management tool that synchronizes operation of the error handlers in response to an error.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Inventors: Anurupa Rajkumari, Andrew C. Walton, Howard Calkin
  • Publication number: 20110154091
    Abstract: A system for error log consolidation is disclosed herein. A server computer includes a plurality of system processors and error log consolidation logic. The system processors are configurable to form isolated execution partitions. The error log consolidation logic is configured to, based on detection of a fault in the server, retrieve error logs from the system processors, and to consolidate the retrieved logs with server computer information not available to the system processors to generate a consolidated error log. The consolidated error log includes a comprehensive set of server information relevant to identifying a cause of the detected fault.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Inventors: Andrew C. WALTON, Howard CALKIN, Anurupa RAJKUMARI
  • Patent number: 7818614
    Abstract: According to one embodiment, a method comprises, responsive to detection of loss of lockstep (LOL) for a processor module in a system, setting status information stored to the system for the processor module to indicate that the processor module has an error. The method further comprises reestablishing lockstep for the processor module without shutting down the system's operating system, and updating the status information for the processor module to indicate that the processor module no longer has the error. The method further comprises causing the system's operating system to recognize that the processor module having its lockstep reestablished is available for processing.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: October 19, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, Sylvia K. Myer
  • Patent number: 7673125
    Abstract: One embodiment of the invention is a method for resetting a partition of a multiple partition system, wherein the partition comprises a plurality of processors, the method comprising executing, by one processor of the plurality of processors, reset code from firmware, building a list of reset register addresses associated with the plurality of processors, sending an interrupt to the other processors of the plurality of processors, resetting the other processors by writing a reset code to their associated reset registers, and resetting the one processor by writing to its associated reset register.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: March 2, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Greg Albrecht, Richard Powers, Anurupa Rajkumari
  • Patent number: 7657776
    Abstract: Embodiments include methods, apparatus, and systems for containing machine check events in a virtual partition. One embodiment is a method of software execution. The method divides a hard partition into first and second virtual partitions and attempts to correct an error in a firmware layer of the first virtual partition. If the error is not correctable, then the method reboots the first virtual partition without disrupting hardware resources in the second virtual partition.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: February 2, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anurupa Rajkumari, Khoa D. Nguyen, Marvin Spinhirne
  • Patent number: 7627781
    Abstract: A system comprises a plurality of processors, and data storage storing information that assigns a role of boot processor to one of the plurality of processors and assigns a role of spare processor to another of the plurality of processors. The system further comprises logic operable, responsive to detecting loss of lockstep for the boot processor, for transferring, during system runtime, the role of boot processor to the spare processor.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: December 1, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari
  • Patent number: 7624302
    Abstract: According to one embodiment, a method comprises detecting loss of lockstep (LOL) for a processor in a multi-processor system. The method further comprises determining that the processor for which the LOL is detected is assigned the role of boot processor, and switching the role of boot processor to a spare processor without shutting down the system's operating system. In another embodiment, a method comprises system firmware determining that an LOL is detected for a lockstep pair of processors that are assigned the role of boot processor in a system. The method further comprises determining one of the lockstep pair of processors that is not the cause of the LOL, and copying the state of the determined one of the lockstep pair of processors that is not the cause of the LOL to a spare processor. The method further comprises switching the role of boot processor to the spare processor.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: November 24, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, William B. McHardy
  • Patent number: 7516359
    Abstract: According to one embodiment, a method comprises detecting a loss of lockstep (LOL) for a processor module. The method further comprises determining a type of LOL that is detected, and, based at least in part on the determined type of LOL, determining a responsive action to take for the LOL. According to one embodiment, a method comprises detecting a loss of lockstep (LOL) for a processor module. The method further comprises using information identifying at least one of type of the detected LOL and source of the detected LOL to determine a responsive action to take for the LOL.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: April 7, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, William B. McHardy
  • Patent number: 7502958
    Abstract: According to at least one embodiment, a method comprises detecting loss of lockstep for a pair of processors. The method further comprises triggering, by firmware, an operating system to idle the processors, and recovering, by the firmware, lockstep between the pair of processors. After lockstep is recovered between the pair of processors, the method further comprises triggering, by the firmware, the operating system to recognize the processors as being available for receiving instructions.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: March 10, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, William B. McHardy
  • Publication number: 20080126780
    Abstract: Embodiments include methods, apparatus, and systems for containing machine check events in a virtual partition. One embodiment is a method of software execution. The method divides a hard partition into first and second virtual partitions and attempts to correct an error in a firmware layer of the first virtual partition.
    Type: Application
    Filed: September 20, 2006
    Publication date: May 29, 2008
    Inventors: Anurupa Rajkumari, Khoa D. Nguyen, Marvin Spinhirne
  • Patent number: 7356733
    Abstract: According to one embodiment, a method comprises system firmware instructing a system's operating system to idle a processor, and responsive to the instructing, the operating system idling the processor and returning control over the processor to the system firmware. According to one embodiment, a method comprises detecting loss of lockstep (LOL) for a processor module in a system, and responsive to the detecting LOL for the processor module, system firmware instructing an operating system to idle the processor module.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: April 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, Sylvia K. Myer, Richard D. Powers
  • Patent number: 7308566
    Abstract: A system comprises a processor module that supports lockstep mode of operation. The system further comprises non-volatile data storage having stored thereto configuration information specifying whether the processor module is desired to operate in lockstep mode. A method comprises storing configuration information to non-volatile data storage of a system, wherein the configuration information specifies whether lockstep mode of operation is desired to be enabled or disabled for a processor module of the system. The method further comprises causing, by the system, the processor module to have its lockstep mode enabled or disabled as specified by the configuration information.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: December 11, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott L. Michaelis, Anurupa Rajkumari, William B. McHardy
  • Publication number: 20060107117
    Abstract: A system comprises a processor module that supports lockstep mode of operation. The system further comprises non-volatile data storage having stored thereto configuration information specifying whether the processor module is desired to operate in lockstep mode. A method comprises storing configuration information to non-volatile data storage of a system, wherein the configuration information specifies whether lockstep mode of operation is desired to be enabled or disabled for a processor module of the system. The method further comprises causing, by the system, the processor module to have its lockstep mode enabled or disabled as specified by the configuration information.
    Type: Application
    Filed: October 25, 2004
    Publication date: May 18, 2006
    Inventors: Scott Michaelis, Anurupa Rajkumari, William McHardy
  • Publication number: 20060107115
    Abstract: According to one embodiment, a method comprises system firmware instructing a system's operating system to idle a processor, and responsive to the instructing, the operating system idling the processor and returning control over the processor to the system firmware. According to one embodiment, a method comprises detecting loss of lockstep (LOL) for a processor module in a system, and responsive to the detecting LOL for the processor module, system firmware instructing an operating system to idle the processor module.
    Type: Application
    Filed: October 25, 2004
    Publication date: May 18, 2006
    Inventors: Scott Michaelis, Anurupa Rajkumari, Sylvia Myer, Richard Powers
  • Publication number: 20060107114
    Abstract: According to one embodiment, a method comprises detecting a loss of lockstep (LOL) for a processor module. The method further comprises determining a type of LOL that is detected, and, based at least in part on the determined type of LOL, determining a responsive action to take for the LOL. According to one embodiment, a method comprises detecting a loss of lockstep (LOL) for a processor module. The method further comprises using information identifying at least one of type of the detected LOL and source of the detected LOL to determine a responsive action to take for the LOL.
    Type: Application
    Filed: October 25, 2004
    Publication date: May 18, 2006
    Inventors: Scott Michaelis, Anurupa Rajkumari, William McHardy
  • Publication number: 20060107112
    Abstract: A system comprises a plurality of processors, and data storage storing information that assigns a role of boot processor to one of the plurality of processors and assigns a role of spare processor to another of the plurality of processors. The system further comprises logic operable, responsive to detecting loss of lockstep for the boot processor, for transferring, during system runtime, the role of boot processor to the spare processor.
    Type: Application
    Filed: October 25, 2004
    Publication date: May 18, 2006
    Inventors: Scott Michaelis, Anurupa Rajkumari