Patents by Inventor Anwar Azaarura Zaa'Rura

Anwar Azaarura Zaa'Rura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Core-Only System Management Interrupt
    Publication number: 20200349312
    Abstract: An apparatus, including: a deterministic monitored device; an interconnect to communicatively couple the monitored device to a support circuit; a super queue to queue transactions between the monitored device and the support circuit, the super queue including an operational segment and a shadow segment; a debug data structure; and a system management agent to monitor transactions in the operational segment, log corresponding transaction identifiers in the shadow segment, and write debug data to the debug data structure, wherein the debug data are at least partly based on the corresponding transaction identifiers.
    Type: Application
    Filed: April 21, 2020
    Publication date: November 5, 2020
    Applicant: Intel Corporation
    Inventors: Tsvika Kurts, Alexander Gendler, Larisa Novakovsky, Anwar Azaarura Zaa'Rura, Afik Sela, Genadi Kazakevich, Alexandra Shainshein, Ariel Sabba
  • Core-only system management interrupt
    Patent number: 10628542
    Abstract: An apparatus, including: a deterministic monitored device; an interconnect to communicatively couple the monitored device to a support circuit; a super queue to queue transactions between the monitored device and the support circuit, the super queue including an operational segment and a shadow segment; a debug data structure; and a system management agent to monitor transactions in the operational segment, log corresponding transaction identifiers in the shadow segment, and write debug data to the debug data structure, wherein the debug data are at least partly based on the corresponding transaction identifiers.
    Type: Grant
    Filed: July 1, 2017
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Tsvika Kurts, Alexander Gendler, Larisa Novakovsky, Anwar Azaarura Zaa'Rura, Afik Sela, Genadi Kazakevich, Alexandra Shainshein, Ariel Sabba
  • Core-Only System Management Interrupt
    Publication number: 20190005160
    Abstract: An apparatus, including: a deterministic monitored device; an interconnect to communicatively couple the monitored device to a support circuit; a super queue to queue transactions between the monitored device and the support circuit, the super queue including an operational segment and a shadow segment; a debug data structure; and a system management agent to monitor transactions in the operational segment, log corresponding transaction identifiers in the shadow segment, and write debug data to the debug data structure, wherein the debug data are at least partly based on the corresponding transaction identifiers.
    Type: Application
    Filed: July 1, 2017
    Publication date: January 3, 2019
    Inventors: Tsvika Kurts, Alexander Gendler, Larisa Novakovsky, Anwar Azaarura Zaa'Rura, Afik Sela, Genadi Kazakevich, Alexandra Shainshein, Ariel Sabba