Patents by Inventor Ao Chang
Ao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230387273Abstract: A system and methods of manufacturing semiconductor devices is described herein. The method includes forming a recess between fins in a substrate and forming a dielectric layer over the fins and in the recess. Once the dielectric layer has been formed, a bottom seed structure is formed over the dielectric layer within the recess and the dielectric layer is exposed along sidewalls of the recess. A dummy gate material is grown from the bottom seed structure in a bottom-up deposition process without growing the dummy gate material from the dielectric layer exposed along sidewalls of the recess.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Chia-Ao Chang, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo
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Patent number: 11710777Abstract: A method of forming a semiconductor device includes depositing a film over a dielectric layer. The dielectric layer is over a first fin, a second fin, and within a trench between the first fin and the second fin. The method further includes etching top portions of the film, performing a treatment on the dielectric layer to remove impurities after etching the top portions of the film, and filling the trench over the remaining portions of the film. The treatment includes bombarding the dielectric layer with radicals.Type: GrantFiled: October 27, 2020Date of Patent: July 25, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Ao Chang, De-Wei Yu, Chii-Horng Li, Yee-Chia Yeo, Hsueh-Chang Sung, Pei-Ren Jeng
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Publication number: 20230215738Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: ApplicationFiled: March 13, 2023Publication date: July 6, 2023Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Patent number: 11605543Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: GrantFiled: February 18, 2022Date of Patent: March 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY. LTD.Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Publication number: 20220344490Abstract: A system and methods of manufacturing semiconductor devices is described herein. The method includes forming a recess between fins in a substrate and forming a dielectric layer over the fins and in the recess. Once the dielectric layer has been formed, a bottom seed structure is formed over the dielectric layer within the recess and the dielectric layer is exposed along sidewalls of the recess. A dummy gate material is grown from the bottom seed structure in a bottom-up deposition process without growing the dummy gate material from the dielectric layer exposed along sidewalls of the recess.Type: ApplicationFiled: April 21, 2021Publication date: October 27, 2022Inventors: Chia-Ao Chang, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo
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Publication number: 20220172958Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: ApplicationFiled: February 18, 2022Publication date: June 2, 2022Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Publication number: 20220130979Abstract: A method of forming a semiconductor device includes depositing a film over a dielectric layer. The dielectric layer is over a first fin, a second fin, and within a trench between the first fin and the second fin. The method further includes etching top portions of the film, performing a treatment on the dielectric layer to remove impurities after etching the top portions of the film, and filling the trench over the remaining portions of the film. The treatment includes bombarding the dielectric layer with radicals.Type: ApplicationFiled: October 27, 2020Publication date: April 28, 2022Inventors: Chia-Ao Chang, De-Wei Yu, Chii-Horng Li, Yee-Chia Yeo, Hsueh-Chang Sung, Pei-Ren Jeng
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Patent number: 11289343Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: GrantFiled: October 4, 2019Date of Patent: March 29, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Patent number: 11211470Abstract: An improved dummy gate and a method of forming the same are disclosed. In an embodiment, the method includes depositing a first material in a trench, the trench being disposed between a first fin and a second fin; etching the first material to expose an upper portion of sidewalls of the trench; and depositing a second material on the first material without the second material being deposited on the exposed upper portion of the sidewalls of the trench.Type: GrantFiled: October 18, 2019Date of Patent: December 28, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Ku Chen, Chii-Horng Li, Cheng-Po Chau, Pei-Ren Jeng, Yee-Chia Yeo, Chia-Ao Chang
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Patent number: 11205709Abstract: Embodiments disclosed herein relate generally to forming a structure, e.g., in high aspect ratio trenches. In an embodiment, a method for semiconductor processing is provided. The method includes forming fins on a substrate. Sidewalls of the fins and a bottom surface between the sidewalls of the fins define a trench therebetween. The method includes forming a gate structure over the fins. The gate structure has a sidewall with a defect region formed therein. The method includes forming a filling layer to fill the defect region in the sidewall of the gate structure.Type: GrantFiled: June 25, 2018Date of Patent: December 21, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Ao Chang, Chien-Hao Chen, De-Wei Yu, Yung-Cheng Lu
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Publication number: 20210119013Abstract: An improved dummy gate and a method of forming the same are disclosed. In an embodiment, the method includes depositing a first material in a trench, the trench being disposed between a first fin and a second fin; etching the first material to expose an upper portion of sidewalls of the trench; and depositing a second material on the first material without the second material being deposited on the exposed upper portion of the sidewalls of the trench.Type: ApplicationFiled: October 18, 2019Publication date: April 22, 2021Inventors: Meng-Ku Chen, Chii-Horng Li, Cheng-Po Chau, Pei-Ren Jeng, Yee-Chia Yeo, Chia-Ao Chang
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Publication number: 20200035506Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: ApplicationFiled: October 4, 2019Publication date: January 30, 2020Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Publication number: 20190393325Abstract: Embodiments disclosed herein relate generally to forming a structure, e.g., in high aspect ratio trenches. In an embodiment, a method for semiconductor processing is provided. The method includes forming fins on a substrate. Sidewalls of the fins and a bottom surface between the sidewalls of the fins define a trench therebetween. The method includes forming a gate structure over the fins. The gate structure has a sidewall with a defect region formed therein. The method includes forming a filling layer to fill the defect region in the sidewall of the gate structure.Type: ApplicationFiled: June 25, 2018Publication date: December 26, 2019Inventors: Chia-Ao Chang, Chien-Hao Chen, De-Wei Yu, Yung-Cheng Lu
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Patent number: 10504747Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: GrantFiled: September 29, 2017Date of Patent: December 10, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Publication number: 20190103284Abstract: A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.Type: ApplicationFiled: September 29, 2017Publication date: April 4, 2019Inventors: De-Wei Yu, Chien-Hao Chen, Chia-Ao Chang, Pin-Ju Liang
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Patent number: 10115639Abstract: A method may include depositing a first conductive material in an opening disposed between a first semiconductor structure and a second semiconductor structure, the first conductive material comprising at least one first void. The method further includes removing a portion of the first conductive material to form a trench, the trench exposing the at least one first void and being defined by a remaining portion of the first conductive material; and depositing a second conductive material in the trench, the second conductive material and the remaining portion of the first conductive material forming a dummy gate layer.Type: GrantFiled: January 20, 2017Date of Patent: October 30, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ping Hung Li, Lun-Kuang Tan, Hui-Ying Lu, Chia-Ao Chang
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Publication number: 20180151693Abstract: A method may include depositing a first conductive material in an opening disposed between a first semiconductor structure and a second semiconductor structure, the first conductive material comprising at least one first void. The method further includes removing a portion of the first conductive material to form a trench, the trench exposing the at least one first void and being defined by a remaining portion of the first conductive material; and depositing a second conductive material in the trench, the second conductive material and the remaining portion of the first conductive material forming a dummy gate layer.Type: ApplicationFiled: January 20, 2017Publication date: May 31, 2018Inventors: Ping Hung Li, Lun-Kuang Tan, Hui-Ying Lu, Chia-Ao Chang
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Publication number: 20050161116Abstract: A bamboo mat board element with a double-layered construction, a constant dimension, each of the elements is formed with a projecting tenon at each of two adjacent sides, respectively, and a concave mortise at each of the other two adjacent sides, respectively, for inter-tenoning the elements of the mat board, in which a surface layer of the mat board is obtained by matting a plurality of mat board stuffs having different orientations, shapes, and sizes, while each of the mat board stuffs is obtained by matting a plurality of lumbers having a parallel orientation, respectively, to form a plurality of patterns having parallel stripes by specially matting at the longitudinal section thickness of the lumbers. A method for producing the bamboo mat board at least comprises steps as follows: cutting step, boiling for blanching step, drying step, rough shaving, bottom layer pre-forming step, adhesive applying and pressing step, pattern selecting step, matting step, and refined shaving, etc.Type: ApplicationFiled: January 26, 2004Publication date: July 28, 2005Inventor: Ao Chang
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Publication number: 20050163990Abstract: A bamboo mat board element with a double-layered construction, a constant dimension, each of the elements is formed with a projecting tenon at each of two adjacent sides, respectively, and a concave mortise at each of the other two adjacent sides, respectively, for inter-tenoning the elements of the mat board, in which a surface layer of the mat board is obtained by matting a plurality of mat board stuffs having different orientations, shapes, and sizes, while each of the mat board stuffs is obtained by matting a plurality of lumbers having a parallel orientation, respectively, to form a plurality of patterns having parallel stripes by specially matting at the longitudinal section thickness of the lumbers. A method for producing the bamboo mat board at least comprises steps as follows: cutting step, boiling for blanching step, drying step, rough shaving, bottom layer pre-forming step, adhesive applying and pressing step, pattern selecting step, matting step, and refined shaving, etc.Type: ApplicationFiled: August 23, 2004Publication date: July 28, 2005Inventor: Ao Chang