Patents by Inventor Aoi HIDAKA

Aoi HIDAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and manufacturing method thereof
    Patent number: 9520560
    Abstract: A semiconductor device according to an embodiment comprises a base layer. A material layer is provided on the base layer. A lower layer portion is provided in lower parts of trenches or holes formed in the material layer and has a crystal structure in a direction not perpendicular to a surface of the base layer. An upper layer portion is provided on the lower layer portion in the trenches or the holes and has a crystal structure in a direction substantially perpendicular to the surface of the base layer.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: December 13, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Aoi Hidaka
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20150349247
    Abstract: A semiconductor device according to an embodiment comprises a base layer. A material layer is provided on the base layer. A lower layer portion is provided in lower parts of trenches or holes formed in the material layer and has a crystal structure in a direction not perpendicular to a surface of the base layer. An upper layer portion is provided on the lower layer portion in the trenches or the holes and has a crystal structure in a direction substantially perpendicular to the surface of the base layer.
    Type: Application
    Filed: July 28, 2014
    Publication date: December 3, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Aoi HIDAKA
  • Superlattice phase change memory device
    Patent number: 9142771
    Abstract: According to one embodiment, a memory device includes a stacked film stacked in a superlattice structure. The stacked film includes a first layer, a second layer, and a third layer different in composition. The first layer is provided between the second layer and the third layer. The second layer includes a first atom reversibly moved by application of energy. The third layer includes a second atom reversibly moved by application of energy. The second atom is different from the first atom.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: September 22, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Aoi Hidaka, Tsukasa Nakai
  • MEMORY DEVICE
    Publication number: 20150008385
    Abstract: According to one embodiment, a memory device includes a stacked film stacked in a superlattice structure. The stacked film includes a first layer, a second layer, and a third layer different in composition. The first layer is provided between the second layer and the third layer. The second layer includes a first atom reversibly moved by application of energy. The third layer includes a second atom reversibly moved by application of energy. The second atom is different from the first atom.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 8, 2015
    Inventors: Aoi HIDAKA, Tsukasa NAKAI