Patents by Inventor Aoyuan FENG

Aoyuan FENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250078699
    Abstract: A display panel includes a substrate, a plurality of display units (Px), at least one first data line, at least one second data line, at least one first detection control unit, at least one second detection control unit, at least one first detection line and at least one second detection line. The first detection line is located at least in a first bezel region, a first end of the first detection line is electrically connected with the first data line through a first detection control unit, and a second end is configured to receive a first detection signal. The second detection line is located at least in a bending region of a second bezel region, a first end of the second detection line is electrically connected to the second data line through a second detection control unit, and a second end is configured to receive the first detection signal.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 6, 2025
    Inventors: Zhiwen CHU, Yi QU, Hongwei MA, Yi ZHANG, Yang ZHOU, Lu BAI, Aoyuan FENG
  • Publication number: 20240381711
    Abstract: A display substrate and a display apparatus. The display substrate includes an electrostatic discharge protection circuit, a power supply line, and at least one auxiliary electrode. The electrostatic discharge protection circuit includes multiple electrostatic discharge protection units, at least one of which extends along a first inclined direction, there is a first preset included angle between the first inclined direction and a first direction, the first direction is an extension direction of a scan signal line in the display region, the first preset included angle is greater than 0° and less than 90°; the first trace region includes the power supply line and at least one auxiliary electrode, an orthographic projection of the at least one auxiliary electrode on a display substrate plane is overlapped with that of the power supply line on the display substrate plane, the at least one auxiliary electrode is connected with the power supply line.
    Type: Application
    Filed: June 29, 2022
    Publication date: November 14, 2024
    Inventors: Yi QU, Zhiwen CHU, Xinxin WANG, Aoyuan FENG, Yang ZHOU, Lu BAI, Junxiu DAI
  • Publication number: 20240276803
    Abstract: A display panel includes a display area, a first fan-out region, a bending region and fan-out traces disposed in the first fan-out region. The fan-out trace includes a lead-out segment and an extension segment that are connected. The fan-out traces include a first trace group and a second trace group that are not symmetrically. The first trace group includes a plurality of first trace bundles. A first trace bundle, closest to the second trace group includes a first sub-bundle and a second sub-bundle, each of which includes a lead-out portion and an extension portion that are connected. The lead-out portion and the extension portion are constituted by lead-out segments and extension segments of fan-out traces in a corresponding sub-bundle, respectively. A distance between the extension portion of the first sub-bundle and the extension portion of the second sub-bundle is greater than a distance between two adjacent fan-out traces in any first trace bundle.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 15, 2024
    Inventors: Xinxin WANG, Bo ZHANG, Zhiwen CHU, Yi QU, Aoyuan FENG
  • Publication number: 20240243136
    Abstract: A display substrate and a display apparatus are provided. The display substrate includes: a display area and a non-display area located around the display area, wherein the non-display area includes: at least one Electro-Static discharge (ESD) protection unit, each ESD protection unit includes: multiple transistors connected in series, a first electrode of each transistor is connected with a gate, and the multiple transistors are arranged along a first inclination direction, a first preset included angle is provided between the first inclination direction and a first direction, the first preset included angle ranges from 10° to 80°, and the first direction is an extending direction of a gate line in the display area.
    Type: Application
    Filed: February 25, 2022
    Publication date: July 18, 2024
    Inventors: Zhiwen CHU, Bo ZHANG, Yi QU, Xinxin WANG, Aoyuan FENG
  • Publication number: 20240244903
    Abstract: The present disclosure provides a display panel and a display apparatus. The display panel includes multiple signal leads located on the base substrate and at least located in the first fanout region; the first fanout region includes at least one fanout edge region, the fanout edge region includes an organic layer covered region and an organic layer uncovered region, an orthographic projection of the first organic composite insulation layer on the base substrate is located in the organic layer covered region, the orthographic projection of the first organic composite insulation layer on the base substrate is not overlapped with the organic layer uncovered region, the second inorganic insulation layer covers the organic layer uncovered region, and an orthographic projection of the second inorganic insulation layer on the base substrate is at least partially overlapped with the orthographic projection of the first organic composite insulation layer on the base substrate.
    Type: Application
    Filed: January 30, 2022
    Publication date: July 18, 2024
    Inventors: Xinxin WANG, Bo ZHANG, Zhiwen CHU, Yi QU, Aoyuan FENG
  • Publication number: 20240206269
    Abstract: Disclosed are a display panel and a display apparatus. The display panel includes a display region and a bonding region located on one side of the display region in a first direction; the display region includes multiple sub-pixels arranged in an array and multiple data lines electrically connected with the multiple sub-pixels; the bonding region includes multiple data line leads connected with the multiple data lines and multiple pins connected with the multiple data line leads, the multiple pins are located on one side of the multiple data line leads away from the display region; the bonding region further includes a first wiring region, a bending region, and a second wiring region disposed in sequence along the first direction, the second wiring region includes a first through hole located between the multiple data line leads, and the first through hole is configured to correspond to a first photosensitive element.
    Type: Application
    Filed: August 31, 2021
    Publication date: June 20, 2024
    Inventors: Zhiwen CHU, Bo ZHANG, Yi QU, Xinxin WANG, Aoyuan FENG
  • Publication number: 20240188390
    Abstract: A display panel has a display region and a peripheral region. The display panel includes a substrate, a first metal layer disposed on the substrate, a planarization layer disposed on a side of the first metal layer away from the substrate, and a retaining wall structure located in the peripheral region and surrounding the display region. The first metal layer includes a signal line pattern located in the peripheral region. The planarization layer includes an opening in the peripheral region. At least a portion of the retaining wall structure is located in the opening. The signal line pattern is provided with at least one through hole, an orthogonal projection of the at least one through hole on the substrate is located within an orthogonal projection of the opening on the substrate, and is at least located on a side of an orthogonal projection of the retaining wall structure on the substrate.
    Type: Application
    Filed: February 20, 2023
    Publication date: June 6, 2024
    Inventors: Bo ZHANG, Zhiwen CHU, Yi QU, Xinxin WANG, Aoyuan FENG, Hongwei MA, Ying LIU, Xin JIN, Lei FAN, Jianbo YANG, Xiaoliang GUO, Lei DENG, Chunfang FAN, Fei LIU, Liangyun LI, Qinbo REN, Yingchang GAO