Patents by Inventor Apparajan Ganesan

Apparajan Ganesan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110121782
    Abstract: The present invention is an ac-to-dc adaptor capable of driving the drill unit of a cordless drill. In the preferred embodiment, the adaptor has essentially the same look and feel as the battery pack normally used with a cordless drill. The adaptor contains conventional electronics to convert an ac line power input into a dc output sufficient to power the drill unit. The invention applies to other cordless tools as well.
    Type: Application
    Filed: November 23, 2009
    Publication date: May 26, 2011
    Inventors: Douglas G. Marsh, Apparajan Ganesan, Ashok Raghunathrao Saraf, Kishore Chandrakant Jambhekar
  • Patent number: 7317234
    Abstract: A means of integrating a microphone on the same integrated circuit die as other electronics in the system is disclosed. The structure uses solder bump technology to form a gap between an electrode on the silicon and another electrode. Charge is stored on the capacitor so when pressure from sound waves causes one electrode to flex, the capacitance and therefore the charge changes, causing signal current. The structure allows for area efficiency by allowing placement of active silicon circuitry under the microphone.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: January 8, 2008
    Inventors: Douglas G Marsh, Apparajan Ganesan
  • Publication number: 20070036299
    Abstract: In accordance with the present invention, a reminder service is disclosed that uses computer-like means to store information regarding the action being reminded. The service allows either the service provider or the end user to define the relevant information, that is, the what of the reminder, the when to do the reminding, the how and where to transmit the reminder, and the form of the reminder.
    Type: Application
    Filed: July 20, 2005
    Publication date: February 15, 2007
    Inventors: Douglas Marsh, Apparajan Ganesan
  • Publication number: 20070018318
    Abstract: A means of integrating a microphone on the same integrated circuit die as other electronics in the system is disclosed. The structure is based on using solder bump technology to form a gap between an electrode on the silicon and another electrode. Charge is stored on the capacitor so when pressure from sound waves causes one electrode to flex, the capacitance and therefore the charge changes, causing signal current.
    Type: Application
    Filed: July 20, 2005
    Publication date: January 25, 2007
    Inventors: Douglas Marsh, Apparajan Ganesan
  • Publication number: 20050205408
    Abstract: In accordance with the present invention, a conventional wind turbine used to generate electricity is modified to have a transparent roof, the roof being constructed in a way similar to seawater distillation plants. A small portion of the electricity generated by wind turbines is used to pump unpurified water to the roof of the generation system where it is distilled into pure drinking water. This water can then be gravity fed or pumped, again using the electricity from the turbine, elsewhere for storage and eventual use. Periodically, the purification process can be shut down and either purified or unpurified water can be used to flush the pollutants back to the water source and to clean the outside of the roof, and energy needed for these operations is also obtained from the electricity generated by the turbines.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 22, 2005
    Inventors: Douglas Marsh, Apparajan Ganesan
  • Patent number: 6864741
    Abstract: The junction difference used for a band gap voltage reference is designed so that it has the needed temperature coefficient without amplification. This is accomplished by the appropriate choice of the number of junctions and the appropriate current densities. Only one polarity of bipolar transistors is required. The noise terms of each junction add in root mean square, rather than be linear amplification, resulting in a lower noise reference than other designs requiring only a single type of bipolar transistors. By using metal available in standard integrated circuit processes to form a resistor, a low temperature coefficient current source can easily be obtained.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: March 8, 2005
    Inventors: Douglas G. Marsh, Apparajan Ganesan
  • Publication number: 20040108887
    Abstract: The junction difference used for a band gap voltage reference is designed so that it has the needed temperature coefficient without amplification. This is accomplished by the appropriate choice of the number of junctions and the appropriate current densities. Only one polarity of bipolar transistors is required. The noise terms of each junction add in root mean square, rather than by linear amplification, resulting in a lower noise reference than other designs requiring only a single type of bipolar transistors. By using metal available in standard integrated circuit processes to form a resistor, a low temperature coefficient current source can easily be obtained.
    Type: Application
    Filed: December 9, 2002
    Publication date: June 10, 2004
    Inventors: Douglas G. Marsh, Apparajan Ganesan
  • Publication number: 20040027253
    Abstract: An automatic meter reading uses information from existing dial or numeric display meters without any modification to the existing meter. Image detection is used to capture the meter image. Digital signal processing means are used to convert the image to characters by rotating, aligning, ordering, and comparing them to a stored character set as needed to represent the actual meter reading. Security based on a typical changes to the meter image can be provided by the same digital signal processing means. The results is the converted to binary form and transmitted using any of a wide variety of available means to a central base for storage, further analysis, and billing.
    Type: Application
    Filed: December 9, 2002
    Publication date: February 12, 2004
    Inventors: Douglas G. Marsh, Apparajan Ganesan
  • Publication number: 20030233711
    Abstract: The mixing valve used in the water fill system of a washing machine is moved from being located inside the washing machine to the water source, eliminating hoses, reducing manufacturing cost, and improving reliability.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Inventors: Douglas G. Marsh, Apparajan Ganesan
  • Patent number: 6219107
    Abstract: A video decoder circuit is provided with automatic AGC bias voltage calibration. The video decoder circuit has an input for receiving a video signal that is capacitively coupled to an analog front-end circuit. The decoder circuit includes a microprocessor-based control circuit coupled to the analog front-end circuit. The control circuit includes a bias circuit, a gain interface circuit for changing the amplitude of the video signal prior to filtering in a filter circuit, an offset circuit for changing the DC-level shift of the video signal, and a switching circuit for switching into a calibration mode by bypassing the filter circuit and connecting the gain interface circuit directly to an analog-to-digital conversion circuit of the analog front-end circuit.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: April 17, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Karl H. Renner, Apparajan Ganesan
  • Patent number: 5550486
    Abstract: A circuit and method to force an output of a logic circuit to a known state when its supply voltage rises above a predetermined level includes an MOS logic transistor (122) connected between the supply voltage (129) and the output line (130) and connected to receive an input signal (126) on its gate. An MOS state controlling transistor (124) of opposite conductivity type from the MOS logic transistor (122) is connected between the output line (130) and a reference potential (-V.sub.ss), with its gate connected to the gate of the MOS logic transistor (122). A resistor (132) is connected between the supply voltage (128) and the gate of the MOS state controlling transistor (124). If the supply voltage (128) rises above the predetermined level established by the threshold voltage of the MOS state controlling transistor, the MOS state controlling transistor (124) conducts to produce the reference potential on the output line (130).
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: August 27, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Frank J. Sweeney, Apparajan Ganesan
  • Patent number: 5517149
    Abstract: Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: May 14, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Apparajan Ganesan, Paul F. Ferguson, Jr., David H. Robertson
  • Patent number: 5404172
    Abstract: A data and synchronization extraction circuit for processing composite video signals containing closed captioning data is disclosed. A dual mode voltage clamp is realized in CMOS technology which includes temperature compensated current sources in the form of complementary current mirrors. A modified version of such current sources is also disclosed which permits trimming of the current after manufacture and packaging. Sync pulses are separated by doubling the amplitude of a composite video signal with an amplifier and comparing the amplified signal with a back porch level derived by a sample-and-hold device. Frequency and phase synchronization is accomplished by a combination of a frequency lock loop and a phase lock loop working in concert to generate a control voltage for a voltage controlled oscillator in a flywheel mode. The voltage controlled oscillator provides a clean source of timing information for the circuit.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: April 4, 1995
    Assignees: EEG Enterprises, Inc., Extratek, Inc.
    Inventors: Eric B. Berman, Apparajan Ganesan, William B. H. Jorden, Philip R. McLaughlin, William Posner
  • Patent number: 5331221
    Abstract: Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: July 19, 1994
    Assignee: Analog Devices, Inc.
    Inventors: Apparajan Ganesan, Paul F. Ferguson, Jr., David H. Robertson
  • Patent number: 5311181
    Abstract: A separate filter circuit is inserted between the D/A converter and the summing junction in the feedback path of a conventional sigma delta modulator. This additional filter allows control of the quantization noise transfer function profile independently of the forward signal transfer function. By proper tailoring of the transfer functions a third or higher order modulator can be constructed without instability developing. The modulator can also be constructed as a completely digital circuit and used as a noise shaping circuit in a digital digital-to-analog converter.
    Type: Grant
    Filed: May 12, 1993
    Date of Patent: May 10, 1994
    Assignee: Analog Devices, Inc.
    Inventors: Paul F. Ferguson, Jr., Apparajan Ganesan, Robert W. Adams
  • Patent number: 5126653
    Abstract: A band-gap voltage reference forming part of a CMOS IC chip. A .DELTA.V.sub.BE voltage is developed by stacked pairs of parasitic bipolar transistors, with the transistors of each pair operated at different current densities. MOS buffer transistors are connected at corresponding ends of the stacks where the .DELTA.V.sub.BE voltage is developed. The bipolar transistors are driven by MOS current sources.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: June 30, 1992
    Assignee: Analog Devices, Incorporated
    Inventors: Apparajan Ganesan, Robert J. Libert
  • Patent number: 5055843
    Abstract: A separate filter circuit is inserted between the D/A converter and the summing junction in the feedback path of a conventional sigma delta modulator. This additional filter allows control of the quantization noise transfer function profile independently of the forward signal transfer function. By proper tailoring of the transfer functions a third or higher order modulator can be constructed without instability developing.
    Type: Grant
    Filed: January 31, 1990
    Date of Patent: October 8, 1991
    Assignee: Analog Devices, Inc.
    Inventors: Paul F. Ferguson, Jr., Apparajan Ganesan, Robert W. Adams
  • Patent number: 5010337
    Abstract: A monolithic chip with an integrated circuit forming an 18-bit D/A converter powered by a single supply of .+-.5 volts. The circuit includes a voltage reference producing two stable voltages of 3.5V and 2.5V which are directed to a control amplifier. This amplifier produces control signals for the current-source cells of a current-steering network utilizing a segmentation decoder for the three most significant bits, a collector-connected R/2R ladder for the intermediate bits, and an emitter-connected R/2R ladder for the remaining least significant bits. The control signals include one for setting the level of current through an NPN current-source transistor, a second for setting the level of current through a PMOS transistor for turning on or off a pair of switching transistors, and a third for establishing a bias voltage for the turn-on circuits for the NPN current-source transistor.
    Type: Grant
    Filed: March 15, 1990
    Date of Patent: April 23, 1991
    Assignee: Analog Devices, Incorporated
    Inventors: Shinichi Hisano, Apparajan Ganesan, Thomas S. Guy
  • Patent number: 4677322
    Abstract: A voltage comparator (10) includes two sampled input networks connected in arallel between an input reference voltage (Vref) and the inverting input (16) of an integrator (12,14), the other input (18) of which is grounded. The first input network has a first input capacitor (C1) which is through-switched at a first sampling frequency (F1). The second input network has a second input capacitor which is diagonally-switched at a second sampling frequency (F2), thus providing an output voltage to the integrator (12,14) which is of opposite polarity to that of the first network. For a given ratio between the capacitors (C1,C2), the output (15) of the integrator is determined by the relationship between the sampling frequencies (F1,F2), thus providing a comparator capability. Also disclosed is a frequency lock loop (34) in which the output (Vcontrol) of a frequency comparator (38) is filtered of the switching frequencies and utilized as the control voltage for a voltage controlled oscillator (42).
    Type: Grant
    Filed: August 16, 1984
    Date of Patent: June 30, 1987
    Assignee: American Telephone and Telegraph Company, AT&T Technologies Inc.
    Inventors: Klye L. Burson, Scott O. Campbell, Apparajan Ganesan, Ronald A. Morrison
  • Patent number: RE35951
    Abstract: A band-gap voltage reference forming part of a CMOS IC chip. A .DELTA.V.sub.BE voltage is developed by stacked pairs of parasitic bipolar transistors, with the transistors of each pair operated at different current densities. MOS buffer transistors are connected at corresponding ends of the stacks where the .DELTA.V.sub.BE voltage is developed. The bipolar transistors are driven by MOS current sources.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: November 10, 1998
    Assignee: Analog Devices, Inc.
    Inventors: Apparajan Ganesan, Robert J. Libert