Patents by Inventor Apurba Roy
Apurba Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7408763Abstract: A low inductance multilayer parallel plate capacitor including at least one pair of consecutive composite layers stacked parallel to each other in the vertical direction, each layer including a dielectric substrate and a conductor plate having at least two lead portions to enable connection to terminal electrodes. Plates on consecutive composite layers are connected to terminal electrodes of opposite polarity, and each plate includes at least one non-conductive region providing directionality to the electrical currents flowing through the plates.Type: GrantFiled: July 13, 2006Date of Patent: August 5, 2008Inventor: Apurba Roy
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Patent number: 7403369Abstract: A low-inductance multilayer parallel plate capacitor in the form of a rectangular parallelepiped includes at least one pair of consecutive composite layers stacked parallel to each other in the vertical direction, each having a dielectric substrate and a conductor plate. Each conductor plate includes one or more lead portions to enable connection to terminations, and plates on consecutive composite layers are connected to terminations of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions that provide directionality to the currents flowing through the plates, resulting in a capacitor structure with greatly reduced inductance.Type: GrantFiled: July 14, 2006Date of Patent: July 22, 2008Inventor: Apurba Roy
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Patent number: 7251116Abstract: A multilayer parallel plate capacitor with an extremely low inductance comprises a generally rectangular parallelepiped that includes at least one pair of generally rectangular consecutive composite layers stacked parallel to each other in the vertical direction, each composite layer of the pair comprising a dielectric substrate and a conductor plate thereon. Each conductor plate includes two or more lead portions to enable connection to terminal electrodes, and plates on consecutive composite layers are connected to terminal electrodes of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions comprising slots in the transverse direction, and one or more non-conductive regions comprising slots in the longitudinal direction. These slots provide directionality to the electrical currents through the plates, resulting in a capacitor structure with greatly reduced inductance.Type: GrantFiled: July 14, 2006Date of Patent: July 31, 2007Inventor: Apurba Roy
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Publication number: 20070019365Abstract: A multilayer parallel plate capacitor with an extremely low inductance in the form of a generally rectangular parallelepiped includes at least one pair of generally rectangular consecutive composite layers stacked parallel to each other in the vertical direction, each composite layer of the pair comprising a dielectric substrate and a conductor plate thereon. Each conductor plate includes one or more lead portions to enable connection to terminations, and plates on consecutive composite layers are connected to terminations of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions, comprising slots, that provide directionality to the currents through the plates, resulting in a capacitor structure with greatly reduced inductance.Type: ApplicationFiled: July 14, 2006Publication date: January 25, 2007Inventor: Apurba Roy
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Publication number: 20070019364Abstract: A multilayer parallel plate capacitor with an extremely low inductance comprises a generally rectangular parallelepiped that includes at least one pair of generally rectangular consecutive composite layers stacked parallel to each other in the vertical direction, each composite layer of the pair comprising a dielectric substrate and a conductor plate thereon. Each conductor plate includes two or more lead portions to enable connection to terminal electrodes, and plates on consecutive composite layers are connected to terminal electrodes of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions comprising slots in the transverse direction, and one or more non-conductive regions comprising slots in the longitudinal direction. These slots provide directionality to the electrical currents through the plates, resulting in a capacitor structure with greatly reduced inductance.Type: ApplicationFiled: July 14, 2006Publication date: January 25, 2007Inventor: Apurba Roy
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Publication number: 20070019363Abstract: A multilayer parallel plate capacitor with an extremely low inductance in the form of a generally rectangular parallelepiped including at least one pair consecutive composite layers stacked parallel to each other in the vertical direction, each composite layer of the pair comprising a dielectric substrate and a conductor plate thereon. Each conductor plate includes two or more lead portions to enable connection to terminal electrodes, with plates on consecutive composite layers connected to terminal electrodes of opposite polarity. Each conductor plate advantageously includes one or more non-conductive regions, comprising slots, that provide directionality to the electrical currents through the plates, resulting in a capacitor structure with greatly reduced inductance.Type: ApplicationFiled: July 13, 2006Publication date: January 25, 2007Inventor: Apurba Roy
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Patent number: 6860003Abstract: In accordance with the invention, a low impedance surface-mount connector comprises a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.Type: GrantFiled: May 2, 2002Date of Patent: March 1, 2005Assignee: DI/DT, Inc.Inventor: Apurba Roy
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Patent number: 6792667Abstract: In accordance with the invention, a high quality magnetic device is produced without manual intervention by the step of providing a substrate including an aperture and conductive coil extending peripherally around the aperture and bonding together two parts of a magnetic body extending through the aperture. The two parts have substantially planar mating surfaces, and the bonding is effected by securing one of the parts to the substrate, applying adhesive to the portion of its mating surface exposed within the aperture, and pressing the mating surface of the second part into contact with the mating surface of the first part. During pressing, the mating surfaces are rotated in a reciprocating fashion to spread the adhesive into a thin, highly uniform film.Type: GrantFiled: October 23, 2001Date of Patent: September 21, 2004Assignee: di/dt, Inc.Inventors: Apurba Roy, Florencio Eiranova
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Patent number: 6750396Abstract: A low impedance surface-mount connector includes a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.Type: GrantFiled: December 15, 2000Date of Patent: June 15, 2004Assignee: di/dt, Inc.Inventor: Apurba Roy
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Patent number: 6722930Abstract: In accordance with the invention, a low impedance surface-mount connector comprises a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.Type: GrantFiled: May 2, 2002Date of Patent: April 20, 2004Assignee: di/dt, Inc.Inventor: Apurba Roy
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Patent number: 6692269Abstract: In accordance with the invention, a circuit module is provided with a plurality of dual capacity connector pads, each pad holding a miniature surface mount connector and/or a connection pin. The preferred I-channel surface mount connector is sufficiently small that the module can be connected by either surface mount or pin to the same region of the circuit board.Type: GrantFiled: December 15, 2000Date of Patent: February 17, 2004Assignee: di/dt, Inc.Inventors: Apurba Roy, Milivoje Slobodan Brkovic
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Patent number: 6649831Abstract: In accordance with the invention, an I-channel surface mount connector comprising a length of cylindrical rod having a generally I-shaped cross section is improved by providing an extended mounting flange. When a first circuit device is connected to a second circuit device with the extended flange extending outward of the first device, the flange can extend beyond the periphery of the first device. This extension has the advantage that the solder bond between the flange and the second device can be easily inspected from above using visual inspection equipment.Type: GrantFiled: October 15, 2002Date of Patent: November 18, 2003Assignee: di/dt, Inc.Inventor: Apurba Roy
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Patent number: 6560105Abstract: In accordance with the invention, an open frame circuit assembly mounted on a planar substrate is provided with a composite low flow impedance voltage guard. The composite guard comprises an ESD protective cover portion and a clip portion to capture the cover portion and clip to the circuit board. The cover portion comprises a lower frame member extending peripherally around the assembly, an apertured top member overlying the assembly and a plurality of spaced apart struts supporting the top member from the frame. The top member and struts have rounded surfaces to preserve streamlines in air flowing over the assembly, and all openings and spacings are sufficiently small to preclude accidental human contact with the assembly. Large area portions of the cover portion are preferably made of polymer containing conductive fillers for ESD protection. The clip portion is preferably made of high elongation polymer for secure holding and clipping.Type: GrantFiled: April 26, 2002Date of Patent: May 6, 2003Assignee: di/dt, Inc.Inventors: Apurba Roy, Michael Zimmerman
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Publication number: 20030074781Abstract: In accordance with the invention, an electronic circuit containing one or more magnetic devices is assembled by the steps of providing a substrate including an aperture and conductive coil extending peripherally around the aperture and bonding together two parts of a magnetic body extending through the aperture. The two parts have substantially planar mating surfaces, and the bonding is effected by securing one of the parts to the substrate, applying adhesive to the portion of its mating surface exposed within the aperture, and pressing the mating surface of the second part into contact with the mating surface of the first part. During pressing, the mating surfaces are rotated in a reciprocating fashion to spread the adhesive into a thin, highly uniform film. This process permits the formation in the cure operation of a high quality bond without clamping. It thus produces a high quality magnetic device without manual intervention and can be part of a fully automated process to fabricate a circuit assembly.Type: ApplicationFiled: October 23, 2001Publication date: April 24, 2003Applicant: di/dt, Inc.Inventors: Apurba Roy, Florencio Eiranova
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Publication number: 20030076656Abstract: In accordance with the invention, an open frame circuit assembly mounted on a planar substrate is provided with a composite low flow impedance voltage guard. The composite guard comprises an ESD protective cover portion and a clip portion to capture the cover portion and clip to the circuit board. The cover portion comprises a lower frame member extending peripherally around the assembly, an apertured top member overlying the assembly and a plurality of spaced apart struts supporting the top member from the frame. The top member and struts have rounded surfaces to preserve streamlines in air flowing over the assembly, and all openings and spacings are sufficiently small to preclude accidental human contact with the assembly. Large area portions of the cover portion are preferably made of polymer containing conductive fillers for ESD protection. The clip portion is preferably made of high elongation polymer for secure holding and clipping.Type: ApplicationFiled: April 26, 2002Publication date: April 24, 2003Applicant: di/dt, Inc.Inventors: Apurba Roy, Michael Zimmerman
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Publication number: 20030047344Abstract: In accordance with the invention, an I-channel surface mount connector comprising a length of cylindrical rod having a generally I-shaped cross section is improved by providing an extended mounting flange. When a first circuit device is connected to a second circuit device with the extended flange extending outward of the first device, the flange can extend beyond the periphery of the first device. This extension has the advantage that the solder bond between the flange and the second device can be easily inspected from above using visual inspection equipment.Type: ApplicationFiled: October 15, 2002Publication date: March 13, 2003Inventor: Apurba Roy
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Patent number: 6503088Abstract: An I-channel surface mount connector includes a length of cylindrical rod having a generally I-shaped cross section is improved by providing an extended mounting flange. When a first circuit device is connected to a second circuit device with the extended flange extending outward of the first device, the flange can extend beyond the periphery of the first device. This extension has the advantage that the solder bond between the flange and the second device can be easily inspected from above using visual inspection equipment.Type: GrantFiled: November 16, 2001Date of Patent: January 7, 2003Assignee: di/dt, Inc.Inventor: Apurba Roy
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Publication number: 20020137404Abstract: In accordance with the invention, a low impedance surface-mount connector comprises a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.Type: ApplicationFiled: May 2, 2002Publication date: September 26, 2002Inventor: Apurba Roy
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Publication number: 20020131255Abstract: In accordance with the invention, a low impedance surface-mount connector comprises a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.Type: ApplicationFiled: May 2, 2002Publication date: September 19, 2002Inventor: Apurba Roy
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Patent number: 6452796Abstract: In accordance with the invention, an open frame circuit assembly mounted on a planar substrate is provided with a low flow impedance voltage guard. The low impedance guard comprises a lower frame member extending peripherally around the assembly, an apertured top member overlying the assembly and a plurality of spaced apart struts supporting the top member from the frame. The top member and struts have rounded surfaces to preserve streamlines in air flowing over the assembly, and all openings and spacings are sufficiently small to preclude accidental human contact with the assembly.Type: GrantFiled: October 23, 2001Date of Patent: September 17, 2002Assignee: di/dt, Inc.Inventor: Apurba Roy