Patents by Inventor Aram MARTIROSYAN

Aram MARTIROSYAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11062022
    Abstract: A method for generating a software container includes receiving a software application and a containerization file. The method also includes building an image file using the containerization file, the image file containing the software application. The method also includes recording, in the image file, an image lineage. The method also includes performing a security scan of the image file to obtain a result, the security scan comprising checking the image file for inadequacies. The method also includes assigning, to the image file, a security level selected from among a plurality of different predetermined security levels. Assigning is based on a combination of the image lineage and the result of the security scan. The method also includes signing the image file with the security level to create a signed image file. The method also includes storing the signed image file as the software container.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: July 13, 2021
    Assignee: Intuit Inc.
    Inventors: Amit Kalamkar, Aram Martirosyan, Sriramu Singaram
  • Patent number: 10361684
    Abstract: A pulse-width-to-voltage (“PWV”) converter, comprises: a switch, a capacitor, a current source, and a current sink. The switch is operable by a signal. The current source, the current sink, and the switch are serially connected across a high voltage potential and a low voltage potential. An output node is coupled to a serial connection between the current source and the current sink. An end of the capacitor is coupled to the output node for converting a current into a control voltage indicative of a duty cycle of the signal.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 23, 2019
    Assignee: Invecas, Inc.
    Inventors: Venkata N. S. N. Rao, Majid Jalali Far, Prasad Chalasani, Aram Martirosyan
  • Publication number: 20190043025
    Abstract: Techniques are disclosed for managing digital assets. One embodiment presented herein includes a computer-implemented method, which includes receiving one or more optimization criteria from a user for optimizing a portfolio of digital assets. The method further includes generating a genome population comprising a plurality of genomes, each of which represents a solution for optimizing the portfolio of digital assets. The method further includes selecting two parent genomes from the genome population, mating the two parent genomes to produce a child genome, mutating the child genome, adding the child genome to the genome population, and removing a number of genomes from the genome population. The method further includes, upon determining, based on the one or more optimization criteria, that a genome in the genome population represents an optimal solution, performing at least one of buying, selling, and trading of digital assets according to the solution represented by the genome.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 7, 2019
    Inventor: Aram MARTIROSYAN
  • Publication number: 20190028090
    Abstract: A pulse-width-to-voltage (“PWV”) converter, comprises: a switch, a capacitor, a current source, and a current sink. The switch is operable by a signal. The current source, the current sink, and the switch are serially connected across a high voltage potential and a low voltage potential. An output node is coupled to a serial connection between the current source and the current sink. An end of the capacitor is coupled to the output node for converting a current into a control voltage indicative of a duty cycle of the signal.
    Type: Application
    Filed: July 19, 2017
    Publication date: January 24, 2019
    Inventors: Venkata N.S.N. Rao, Majid Jalali Far, Prasad Chalasani, Aram Martirosyan
  • Patent number: 9350395
    Abstract: A transmitting circuit includes a positive differential node, a negative differential node, a voltage mode driver, and a current mode driver. The voltage mode driver generates a first positive differential signal and a first negative differential signal. The voltage mode driver provides the first positive differential signal to the positive differential node and provides the first negative differential signal to the negative differential node. The current mode driver generates a second positive differential signal and a second negative differential signal. The current mode driver provides the second positive differential signal to the positive differential node and provides the second negative differential signal to the negative differential node. A differential signal voltage swing width between the positive differential node and the negative differential node is based at least on the operational state of the current mode driver and/or the voltage mode driver.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 24, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Aram Martirosyan, Jong-Shin Shin
  • Publication number: 20150222301
    Abstract: A transmitting circuit includes a positive differential node, a negative differential node, a voltage mode driver, and a current mode driver. The voltage mode driver generates a first positive differential signal and a first negative differential signal. The voltage mode driver provides the first positive differential signal to the positive differential node and provides the first negative differential signal to the negative differential node. The current mode driver generates a second positive differential signal and a second negative differential signal. The current mode driver provides the second positive differential signal to the positive differential node and provides the second negative differential signal to the negative differential node. A differential signal voltage swing width between the positive differential node and the negative differential node is based at least on the operational state of the current mode driver and/or the voltage mode driver.
    Type: Application
    Filed: December 4, 2014
    Publication date: August 6, 2015
    Inventors: Aram MARTIROSYAN, Jong-Shin SHIN