Abstract: One or more non-transitory computer-readable storage media is provided, the storage media is configured to store instructions that, when executed by a processor included in an apparatus, cause the processor to perform operations comprising: identify a plurality of transition faults that is to possibly occur in a circuit; generate a plurality of modified fault expressions, at least one of the plurality of modified fault expressions being associated with a corresponding transition fault of the plurality of transition faults; identify a plurality of test patterns, wherein at least one test pattern of the plurality of test patterns results in satisfiability of corresponding one or more of the plurality of modified fault expressions; and output the plurality of test patterns to a testing arrangement to test the circuit

Abstract: A method is described that includes performing the following by executing program code on a computing system. Generating an expression describing the operation of an electronic circuit for each of a plurality of faults within the circuit. Generating a plurality of fault equations for each of the faults that compare output bits of a faulty circuit with output bits of a working circuit. Combining the fault equations into a conjunctive logical expression. Attempting to solve a problem posed by the conjunctive logical expression with a MAXSAT solver to generate a test vector for the electronic circuit.