Patents by Inventor Arash Izadi

Arash Izadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10574222
    Abstract: A voltage driver is provided that includes a driver circuit, comprising (i) first positive channel transistor devices (PCTDs) coupled in series between a reference node and an output node; and (ii) first negative channel transistor devices (NCTDs) coupled in series between the output node and an electrical ground node. The voltage driver further includes a speed-up circuit comprising: (i) second NCTDs coupled to the first PCTDs, configured to discharge gate-source capacitances of the first PCTDs; and (ii) second PCTDs coupled to the first NCTDs, configured to discharge gate-source capacitances of the first NCTDs. The voltage driver further includes a gate voltage circuit coupled to the driver circuit that includes third NCTDs and third PCTDs to provide respective first and second gate voltages to each of a subset of the first PCTDs and a subset of the first NCTDs.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: February 25, 2020
    Assignee: PSIQUANTUM CORP.
    Inventor: Arash Izadi
  • Patent number: 10511294
    Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: December 17, 2019
    Assignee: Finisar Corporation
    Inventors: Sagar Ray, Arash Izadi
  • Publication number: 20190123726
    Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.
    Type: Application
    Filed: November 5, 2018
    Publication date: April 25, 2019
    Inventors: Sagar Ray, Arash Izadi
  • Patent number: 10122353
    Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: November 6, 2018
    Assignee: Finisar Corporation
    Inventors: Sagar Ray, Arash Izadi
  • Publication number: 20180076800
    Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.
    Type: Application
    Filed: September 8, 2017
    Publication date: March 15, 2018
    Inventors: Sagar Ray, Arash Izadi