Abstract: Techniques for removing crosstalk from a system, e.g., an audio system, having first and second (e.g., left and right) channels. In an aspect, first and second output voltages of corresponding first and second amplifiers are sampled during a calibration mode, in which one of the amplifiers is driven with a reference voltage, and the output of the other of the amplifiers is configured to have a high impedance. The sampled first and second output voltages may be digitized for processing by a processor to estimate a crosstalk removal function. The crosstalk removal function may then be multiplied with the input signals and added in a cross-channel manner to the first and second input signals prior to amplification to remove crosstalk from the system. In certain aspects, multiple reference voltages may be applied during the calibration mode to improve the estimate of the crosstalk removal function.

Abstract: A method and an apparatus for operating an electronic sensor and an electronic user input are provided. In one configuration, the apparatus includes a detection circuit configured to recognize a user input voltage generated by an electronic user input and a power supply configured to supply power to a detection circuit continuous without polling. In another configuration, the apparatus includes a port, a first power supply, a second power supply, and a control circuit configured to selectively couple the first power supply or the second power supply to the port based on a state of operation of an electronic sensor coupled to the port.

Abstract: Cancelling a delay in a comparator of an RC oscillator configured to generate a clock pulse, including: selectively coupling a plurality of current sources to a first capacitor, a second capacitor, and a resistor, wherein the plurality of current source charge and discharge the first capacitor and the second capacitor, and charge the resistor; charging the first capacitor at a higher rate during a first phase of the clock pulse than a second phase of the clock pulse, and charging the second capacitor at a higher rate during a third phase of the clock pulse than a fourth phase of the clock pulse; and generating the clock pulse by enabling the comparator to compare a voltage on the first or second capacitor with a voltage on the resistor.

Abstract: An apparatus includes an operational amplifier and a plurality of capacitors coupled to an input terminal of the operational amplifier and configured to be selectively coupled to receive one of an input voltage signal and an output voltage signal of the operational amplifier.

Abstract: An integrated DC blocking amplifier circuit, including: an operational amplifier configured in a differential amplifier; and at least first and second two-stage switched-capacitor circuits, each two stage switched-capacitor circuit including a first-stage circuit and a second-stage circuit, wherein the first two-stage switched capacitor circuit is connected to a positive feedback path of the operational amplifier and the second two-stage switched capacitor circuit is connected to a negative feedback path of the operational amplifier, wherein the first-stage circuit is switched at a relatively low switching frequency, while the second-stage circuit is switched at a relatively high switching frequency.

Abstract: A particular apparatus includes a receptacle having a first pin configured to contact a tip region of the device plug at a first location when the device plug is inserted into the receptacle. The first location may be located between a midpoint of the tip region and a tip of the device plug. The receptacle further includes a second pin configured to contact a second region of the device plug at a second location. The receptacle further includes a third pin configured to contact a third region of the device plug at a third location. The receptacle further includes a fourth pin configured to contact a fourth region of the device.

Abstract: Techniques for detecting full insertion of a media plug into a corresponding jack. In an exemplary embodiment, first insertion detection circuitry for detecting the presence of a load is coupled to an innermost terminal of the jack. For North American type audio plugs, the first insertion detection circuitry detects the presence of a left headphone channel coupled to the innermost terminal of the jack. Coupling the insertion detection circuitry to the innermost terminal of the jack advantageously allows detection only when the plug is fully inserted into the jack. Additional detection circuitry may be provided and coupled to the other terminals of the jack. The disclosed techniques may readily be applied to other types of media plugs, e.g., European audio plugs, video plugs, etc.

Abstract: A method and an apparatus are provided. The apparatus reduces noise in headphones due to a change in a current or a voltage in headphones while determining an impedance of the headphones. The apparatus generates a digital waveform that reduces noise in the headphones when applied for an impedance determination. The apparatus converts the digital waveform to an analog waveform. The apparatus applies the analog waveform to an input of the headphones while reducing the noise in the headphones due to the application of the analog waveform for the impedance determination. The apparatus determines the impedance of the headphones based on the applied analog waveform. A first derivative of the analog waveform may be continuous. In particular, the analog waveform may be “s” shaped. The digital waveform may be generated based on a ramp digital waveform. The ramp digital waveform may be generated based on a step digital waveform.

Abstract: Techniques for designing a transconductor configurable to have a low transconductance. In one aspect, a voltage to current conversion module is coupled to a 1:N current replication module. The voltage to current conversion module may be implemented as an operational amplifier configured with negative feedback to generate a current through a transistor, wherein such current is proportional to the difference between an input voltage and a common-mode reference. The 1:N current replication module is configured to mirror the generated current in another transistor, to a predetermined ratio, such that the output current is also proportional to the difference between the input voltage and the common-mode reference. In exemplary embodiments, the output stage driving the output current may be configured to operate as a Class A, Class B, or Class AB type amplifier.

Abstract: Techniques for removing crosstalk from a system, e.g., an audio system, having first and second (e.g., left and right) channels. In an aspect, first and second output voltages of corresponding first and second amplifiers are sampled during a calibration mode, in which one of the amplifiers is driven with a reference voltage, and the output of the other of the amplifiers is configured to have a high impedance. The sampled first and second output voltages may be digitized for processing by a processor to estimate a crosstalk removal function. The crosstalk removal function may then be multiplied with the input signals and added in a cross-channel manner to the first and second input signals prior to amplification to remove crosstalk from the system. In certain aspects, multiple reference voltages may be applied during the calibration mode to improve the estimate of the crosstalk removal function.

Abstract: A particular apparatus includes a receptacle having a first pin configured to contact a tip region of the device plug at a first location when the device plug is inserted into the receptacle. The first location may be located between a midpoint of the tip region and a tip of the device plug. The receptacle further includes a second pin configured to contact a second region of the device plug at a second location. The receptacle further includes a third pin configured to contact a third region of the device plug at a third location. The receptacle further includes a fourth pin configured to contact a fourth region of the device.

Abstract: Techniques for designing a transconductor configurable to have a low transconductance. In one aspect, a voltage to current conversion module is coupled to a 1:N current replication module. The voltage to current conversion module may be implemented as an operational amplifier configured with negative feedback to generate a current through a transistor, wherein such current is proportional to the difference between an input voltage and a common-mode reference. The 1:N current replication module is configured to mirror the generated current in another transistor, to a predetermined ratio, such that the output current is also proportional to the difference between the input voltage and the common-mode reference. In exemplary embodiments, the output stage driving the output current may be configured to operate as a Class A, Class B, or Class AB type amplifier.

Abstract: Techniques for detecting the type of a media plug inserted into a corresponding jack. In an exemplary embodiment, the output of a first power amplifier for driving a media plug terminal, e.g., the right headphone or left headphone, is selectively coupled to a reference voltage. Measurements of the voltage at a microphone terminal of the media plug may be alternately made for the reference voltage being at a first value and a second value. In an embodiment, the first power amplifier output voltage may be varied by opening or closing a switch. Alternatively, the first power amplifier output voltage may be directly set by an input voltage to the first power amplifier. By detecting changes in the voltages measured at the microphone terminal, it may be determined whether the media plug is of a North American type or European type.

Abstract: Techniques for detecting full insertion of a media plug into a corresponding jack. In an exemplary embodiment, first insertion detection circuitry for detecting the presence of a load is coupled to an innermost terminal of the jack. For North American type audio plugs, the first insertion detection circuitry detects the presence of a left headphone channel coupled to the innermost terminal of the jack. Coupling the insertion detection circuitry to the innermost terminal of the jack advantageously allows detection only when the plug is fully inserted into the jack. Additional detection circuitry may be provided and coupled to the other terminals of the jack. The disclosed techniques may readily be applied to other types of media plugs, e.g., European audio plugs, video plugs, etc.

Abstract: Techniques for determining the impedance of a load coupled to an amplifier. In an exemplary embodiment, a mirroring transistor is provided to mirror the current through a transistor of the amplifier output stage to a predetermined ratio. The impedance of the load may be calculated based on the mirrored current and the amplifier output voltage provided to the load. In an exemplary embodiment, the mirrored current may be digitized and provided to a digital load impedance calculation block, which estimates the load impedance based on the digitized current and an indication of the amplifier output voltage. Further techniques are described for calibrating the load impedance calculation scheme, and for differentiating between stereo and mono audio plugs using said techniques.