Patents by Inventor Arata IIZUKA

Arata IIZUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961784
    Abstract: A first heat sink has a first inner surface and a first outer surface, and has a first through hole. A second heat sink has a second inner surface disposed with a clearance left from the first inner surface of the first heat sink, and a second outer surface opposite to the second inner surface, and has a second through hole. A semiconductor element is disposed within a clearance between the first inner surface of the first heat sink and the second inner surface of the second heat sink. A sealing member seals the semiconductor element within the clearance between the first inner surface and the second inner surface. A first hollow tube is made of metal, and connects the first through hole and the second through hole.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 16, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Arata Iizuka, Korehide Okamoto, Ryoya Shirahama
  • Patent number: 11854950
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: December 26, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Arata Iizuka, Takeshi Omaru
  • Publication number: 20220278004
    Abstract: An insulating substrate (2) is provided on a base plate (1). A semiconductor device (6-9) is provided on the insulating substrate (2). A case (10) is arranged to surround the insulating substrate and the semiconductor device and bonded to the base plate (1) with an adhesive (11). A sealant (22) seals the insulating substrate and the semiconductor device in the case (10). A groove (23) is provided on a lower surface of the case (10) opposing an upper surface peripheral portion of the base plate (1). A bottom surface of the groove (23) has a protruding part (24) protruding toward the base plate (1). The protruding part (24) includes a vertex (25) and gradients (26,27) respectively provided on an inner side and on an outer side of the case (10) with the vertex (25) sandwiched therebetween. The adhesive (11) contacts the vertex (25) and is housed in the groove (23).
    Type: Application
    Filed: November 27, 2019
    Publication date: September 1, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroya SANNAI, Seiichiro INOKUCHI, Yuji IMOTO, Arata IIZUKA
  • Publication number: 20220059432
    Abstract: A first heat sink has a first inner surface and a first outer surface, and has a first through hole. A second heat sink has a second inner surface disposed with a clearance left from the first inner surface of the first heat sink, and a second outer surface opposite to the second inner surface, and has a second through hole. A semiconductor element is disposed within a clearance between the first inner surface of the first heat sink and the second inner surface of the second heat sink. A sealing member seals the semiconductor element within the clearance between the first inner surface and the second inner surface. A first hollow tube is made of metal, and connects the first through hole and the second through hole.
    Type: Application
    Filed: November 19, 2018
    Publication date: February 24, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Arata IIZUKA, Korehide OKAMOTO, Ryoya SHIRAHAMA
  • Publication number: 20210398885
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Arata IIZUKA, Takeshi OMARU
  • Patent number: 11152287
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: October 19, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Arata Iizuka, Takeshi Omaru
  • Patent number: 11063004
    Abstract: An object of the present invention is to provide a semiconductor device capable of reducing external stress transmitted to a semiconductor chip through a lead frame. A semiconductor device includes a base plate, a semiconductor element held on the base plate, a housing disposed on the base plate and having a frame shape enclosing the semiconductor element, a terminal section provided in an outer surface of the housing and connectable to an external device, a lead frame that is long and has one end disposed so as to be connectable to the terminal section provided in the housing and another end connected onto the semiconductor element via a bonding material, a sealing material disposed in the housing to seal the lead frame and the semiconductor element, and a fixing section that fixes, in the housing, part of the lead frame to the base plate or the housing.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: July 13, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takahiko Murakami, Arata Iizuka, Ryoji Murai, Katsuji Ando
  • Publication number: 20210202330
    Abstract: A semiconductor device includes a semiconductor element, a heat sink on which the semiconductor element is mounted, and a case made of resin, the case being mounted on the heat sink and containing the semiconductor element. A fastening hole is formed passing through the case and the heat sink. The case includes a surface pressure absorbing member on a portion including the fastening hole in plan view, the surface pressure absorbing member having a plate shape and being higher in rigidity than the resin.
    Type: Application
    Filed: November 22, 2017
    Publication date: July 1, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Arata IIZUKA, Korehide OKAMOTO
  • Publication number: 20200058600
    Abstract: An object of the present invention is to provide a semiconductor device capable of reducing external stress transmitted to a semiconductor chip through a lead frame. A semiconductor device includes a base plate, a semiconductor element held on the base plate, a housing disposed on the base plate and having a frame shape enclosing the semiconductor element, a terminal section provided in an outer surface of the housing and connectable to an external device, a lead frame that is long and has one end disposed so as to be connectable to the terminal section provided in the housing and another end connected onto the semiconductor element via a bonding material, a sealing material disposed in the housing to seal the lead frame and the semiconductor element, and a fixing section that fixes, in the housing, part of the lead frame to the base plate or the housing.
    Type: Application
    Filed: November 29, 2016
    Publication date: February 20, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takahiko MURAKAMI, Arata IIZUKA, Ryoji MURAI, Katsuji ANDO
  • Patent number: 10510642
    Abstract: The present invention relates to a semiconductor device module which includes: a semiconductor device including a top electrode and a bottom electrode; a substrate on which the bottom electrode of the semiconductor device is bonded; a heat sink on which the substrate is mounted; a lead electrode through which a main current of the semiconductor device flows; an insulating case disposed to enclose the substrate; and a retainer disposed in a cantilevered manner in the insulating case, the retainer supporting the lead electrode, wherein the lead electrode has one end brazed to the top electrode of the semiconductor device, and another end side inserted into a wall of the insulating case, and the retainer is engaged on the one end of the lead electrode to restrict movement of the lead electrode.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: December 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Arata Iizuka, Korehide Okamoto, Natsuki Tsuji
  • Publication number: 20190252300
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Application
    Filed: November 8, 2016
    Publication date: August 15, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Arata IIZUKA, Takeshi OMARU
  • Publication number: 20190131213
    Abstract: The present invention relates to a semiconductor device module which includes: a semiconductor device including a top electrode and a bottom electrode; a substrate on which the bottom electrode of the semiconductor device is bonded; a heat sink on which the substrate is mounted; a lead electrode through which a main current of the semiconductor device flows; an insulating case disposed to enclose the substrate; and a retainer disposed in a cantilevered manner in the insulating case, the retainer supporting the lead electrode, wherein the lead electrode has one end brazed to the top electrode of the semiconductor device, and another end side inserted into a wall of the insulating case, and the retainer is engaged on the one end of the lead electrode to restrict movement of the lead electrode.
    Type: Application
    Filed: June 3, 2016
    Publication date: May 2, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Arata IIZUKA, Korehide OKAMOTO, Natsuki TSUJI
  • Patent number: 9601408
    Abstract: A semiconductor device of the present invention includes a semiconductor element having an upper surface and a lower surface, a metal plate thermally connected to the lower surface, an upper surface electrode soldered to the upper surface, an insulating sheet formed on the upper surface electrode so as to be in surface contact with the upper surface electrode, a shielding plate formed on the insulating sheet so as to be in surface contact with the insulating sheet, the shielding plate shielding against radiation noise, and a resin with which the semiconductor element is covered, while a portion of the upper surface electrode, a portion of the shielding plate and a lower surface of the metal plate are exposed to the outside, wherein the heat conductivity of the insulating sheet is higher than the heat conductivity of the resin.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: March 21, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoji Saito, Khalid Hassan Hussein, Arata Iizuka
  • Patent number: 9515061
    Abstract: A semiconductor module includes first and second semiconductor elements connected in series, an insulating substrate, first and second metal patterns formed on a first main surface and a second main surface of the insulating substrate, and first, second, and third electrode plates. A lower surface electrode and an upper surface electrode of the first semiconductor element are bonded to the first metal pattern and the first electrode plate, respectively. The first metal pattern and the third electrode plate are bonded together. An upper surface electrode of the second semiconductor element is bonded to the third electrode plate. A lower surface electrode of the second semiconductor element is electrically connected to the second metal pattern. The second metal pattern and the second electrode plate are bonded together. One end of the first electrode plate and one end of the second electrode plate are led out on the same side.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: December 6, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Seiichiro Inokuchi, Arata Iizuka
  • Publication number: 20160181232
    Abstract: A semiconductor module includes first and second semiconductor elements connected in series, an insulating substrate, first and second metal patterns formed on a first main surface and a second main surface of the insulating substrate, and first, second, and third electrode plates. A lower surface electrode and an upper surface electrode of the first semiconductor element are bonded to the first metal pattern and the first electrode plate, respectively. The first metal pattern and the third electrode plate are bonded together. An upper surface electrode of the second semiconductor element is bonded to the third electrode plate. A lower surface electrode of the second semiconductor element is electrically connected to the second metal pattern. The second metal pattern and the second electrode plate are bonded together. One end of the first electrode plate and one end of the second electrode plate are led out on the same side.
    Type: Application
    Filed: October 6, 2015
    Publication date: June 23, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Seiichiro INOKUCHI, Arata IIZUKA
  • Publication number: 20150340325
    Abstract: A semiconductor device of the present invention includes a semiconductor element having an upper surface and a lower surface, a metal plate thermally connected to the lower surface, an upper surface electrode soldered to the upper surface, an insulating sheet formed on the upper surface electrode so as to be in surface contact with the upper surface electrode, a shielding plate formed on the insulating sheet so as to be in surface contact with the insulating sheet, the shielding plate shielding against radiation noise, and a resin with which the semiconductor element is covered, while a portion of the upper surface electrode, a portion of the shielding plate and a lower surface of the metal plate are exposed to the outside, wherein the heat conductivity of the insulating sheet is higher than the heat conductivity of the resin.
    Type: Application
    Filed: October 25, 2012
    Publication date: November 26, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shoji SAITO, Khalid Hassan HUSSEIN, Arata IIZUKA