Patents by Inventor Arata Kishi

Arata Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11028262
    Abstract: Disclosed is a resin composition that contains conductive particles, a resin component and a curing agent. The conductive particles contain solder, and the resin component contains an epoxy resin and a phenoxy resin. The curing agent contains a first compound having at least one thiol group and a second compound having an amino group.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 8, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuki Yoshioka, Arata Kishi
  • Patent number: 10464153
    Abstract: A connecting method of a circuit member, includes: a first process of preparing a connection material that a solder material disperses in the adhesive; a second process of disposing the first circuit member and the second circuit member to cause the first electrode of the first circuit member and the second electrode of the second circuit member to oppose each other via the connection material; and a third process of compressing the first circuit member and the second circuit member while applying heat to the connection material. The third process includes a first pressing process which is performed before a temperature of the connection material reaches a melting point of the solder material, and a second pressing process which follows the first pressing process.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: November 5, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Hiroki Maruo
  • Publication number: 20190284388
    Abstract: Disclosed is a resin composition that contains conductive particles, a resin component and a curing agent. The conductive particles contain solder, and the resin component contains an epoxy resin and a phenoxy resin. The curing agent contains a first compound having at least one thiol group and a second compound having an amino group.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 19, 2019
    Inventors: Yuki YOSHIOKA, Arata KISHI
  • Patent number: 10412838
    Abstract: There is provided a conductive particle including a core particle containing a resin material, and a surface layer that covers a surface of the core particle and contains a solder material, in which a melting point of the solder material is equal to or lower than a softening point of the resin material.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: September 10, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Hiroki Maruo
  • Patent number: 10407604
    Abstract: Provided is a heat-dissipating resin composition including: a rubber material having an average emissivity of 80% or higher in a wavelength range from 5 ?m to 20 ?m; and a filler having a grain diameter of 15 ?m or smaller and an aspect ratio of 3 to 10, wherein the heat-dissipating resin composition has an emissivity of 90% or higher in the wavelength range from 5 ?m to 20 ?m.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: September 10, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Honami Nawa, Hirohisa Hino, Arata Kishi, Naomichi Ohashi, Yasuhiro Suzuki, Hidenori Miyakawa
  • Patent number: 10412834
    Abstract: A mounting structure includes a bonding material (106) that bonds second electrodes (104) of a circuit board (105) and bumps (103) of a semiconductor package (101), the bonding material (106) being surrounded by a first reinforcing resin (107). Moreover, a portion between the outer periphery of the semiconductor package (101) and the circuit board (105) is covered with a second reinforcing resin (108). Even if the bonding material (106) is a solder material having a lower melting point than a conventional bonding material, high drop resistance is obtained.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: September 10, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Hironori Munakata, Koji Motomura, Hiroki Maruo
  • Patent number: 10037960
    Abstract: There is provided a connection structure of a circuit member including: a first circuit member having a first main surface provided with a first electrode; a second circuit member having a second main surface provided with a second electrode; and a joining portion which is interposed between the first main surface and the second main surface, in which the joining portion has a solder portion which electrically connects the first electrode and the second electrode to each other, in which the solder portion contains a bismuth-indium alloy, and in which an amount of bismuth contained in the bismuth-indium alloy exceeds 20% by mass and is equal to or less than 80% by mass.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: July 31, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Hiroki Maruo
  • Patent number: 9999123
    Abstract: A connection structure of circuit members includes a first circuit member, a second circuit member, and a joint portion. The first circuit member has a first main surface on which a light-transparent electrode is provided. The second circuit member has a second main surface on which a metal electrode is provided. The joint portion is interposed between the first main surface and the second main surface. The joint portion includes a resin portion and a solder portion. The solder portion electrically connects the light-transparent electrode and the metal electrode. The light-transparent electrode contains an oxide that includes indium and tin, and the solder portion contains bismuth and indium.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: June 12, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Tadashi Maeda, Tadahiko Sakai
  • Publication number: 20170374743
    Abstract: A mounting structure includes a bonding material (106) that bonds second electrodes (104) of a circuit board (105) and bumps (103) of a semiconductor package (101), the bonding material (106) being surrounded by a first reinforcing resin (107). Moreover, a portion between the outer periphery of the semiconductor package (101) and the circuit board (105) is covered with a second reinforcing resin (108). Even if the bonding material (106) is a solder material having a lower melting point than a conventional bonding material, high drop resistance is obtained.
    Type: Application
    Filed: September 8, 2017
    Publication date: December 28, 2017
    Inventors: Arata KISHI, Hironori MUNAKATA, Koji MOTOMURA, Hiroki MARUO
  • Publication number: 20170345782
    Abstract: There is provided a connection structure of a circuit member including: a first circuit member having a first main surface provided with a first electrode; a second circuit member having a second main surface provided with a second electrode; and a joining portion which is interposed between the first main surface and the second main surface, in which the joining portion has a solder portion which electrically connects the first electrode and the second electrode to each other, in which the solder portion contains a bismuth-indium alloy, and in which an amount of bismuth contained in the bismuth-indium alloy exceeds 20% by mass and is equal to or less than 80% by mass.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 30, 2017
    Inventors: ARATA KISHI, HIROKI MARUO
  • Publication number: 20170347463
    Abstract: There is provided a conductive particle including a core particle containing a resin material, and a surface layer that covers a surface of the core particle and contains a solder material, in which a melting point of the solder material is equal to or lower than a softening point of the resin material.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 30, 2017
    Inventors: ARATA KISHI, HIROKI MARUO
  • Publication number: 20170326663
    Abstract: A connecting method of a circuit member, includes: a first process of preparing a connection material that a solder material disperses in the adhesive; a second process of disposing the first circuit member and the second circuit member to cause the first electrode of the first circuit member and the second electrode of the second circuit member to oppose each other via the connection material; and a third process of compressing the first circuit member and the second circuit member while applying heat to the connection material. The third process includes a first pressing process which is performed before a temperature of the connection material reaches a melting point of the solder material, and a second pressing process which follows the first pressing process.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 16, 2017
    Inventors: ARATA KISHI, HIROKI MARUO
  • Patent number: 9795036
    Abstract: A mounting structure includes a bonding material (106) that bonds second electrodes (104) of a circuit board (105) and bumps (103) of a semiconductor package (101), the bonding material (106) being surrounded by a first reinforcing resin (107). Moreover, a portion between the outer periphery of the semiconductor package (101) and the circuit board (105) is covered with a second reinforcing resin (108). Even if the bonding material (106) is a solder material having a lower melting point than a conventional bonding material, high drop resistance is obtained.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: October 17, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Arata Kishi, Hironori Munakata, Koji Motomura, Hiroki Maruo
  • Patent number: 9603295
    Abstract: In a case where a first mounted substrate to which a semiconductor element is bounded by solder is mounted on a second substrate, connection strength becomes low, when the first mounted substrate is bonded to the second substrate by using a solder having a low melting point. A mounted structure, in which a first mounted substrate on which a semiconductor element is bonded by using a first solder having a melting point of 217° C. or more, is mounted on a second substrate, includes plural bonding parts bonding the first mounted substrate to the second substrate; and a reinforcing member formed around the bonding part. Each of the bonding parts contains a second solder having a melting point, that is lower than the melting point of the first solder, and a space exists, in which the reinforcing members do not exist, between the bonding parts neighboring each other.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: March 21, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Atsushi Yamaguchi, Hisahiko Yoshida, Arata Kishi, Naomichi Ohashi
  • Publication number: 20160316554
    Abstract: A connection structure of circuit members includes a first circuit member, a second circuit member, and a joint portion. The first circuit member has a first main surface on which a light-transparent electrode is provided. The second circuit member has a second main surface on which a metal electrode is provided. The joint portion is interposed between the first main surface and the second main surface. The joint portion includes a resin portion and a solder portion. The solder portion electrically connects the light-transparent electrode and the metal electrode. The light-transparent electrode contains an oxide that includes indium and tin, and the solder portion contains bismuth and indium.
    Type: Application
    Filed: March 18, 2016
    Publication date: October 27, 2016
    Inventors: ARATA KISHI, TADASHI MAEDA, TADAHIKO SAKAI
  • Patent number: 9331047
    Abstract: A semiconductor package component (3) is mounted on a substrate (1) in such a manner that an electrode (2) of the substrate (1) and an electrode of the semiconductor package component (3) are brought into contact with each other through a joining material (4). A reinforcing adhesive (5c) is applied between the substrate (1) and the outer surface of the semiconductor package component (3). Then, reflow is performed to melt the joining metal (4) with the reinforcing adhesive (5c) uncured. After the reinforcing adhesive (5c) is cured, the joining metal (4) is solidified.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: May 3, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Naomichi Ohashi, Atsushi Yamaguchi, Arata Kishi, Masato Udaka, Seiji Tokii
  • Patent number: 9322541
    Abstract: A cooling structure can efficiently reduce heat, thereby suppressing temperature elevation in heat-producing electronic apparatuses, without using a heat sink or water-cooling jacket, and which can achieve their downsizing or weight reduction. The cooling structure includes: a heat conduction layer which is formed by coating a first paste on a surface of a heat-producing object; and a heat radiation layer which is formed by coating a second paste on a surface of the heat conduction layer. The heat conduction layer includes a first resin and a first filler, and a heat conductivity ? of the heat conduction layer is 1.0 W/(m·K) or more. The heat radiation layer includes a second resin and a second filler, and an infrared emissivity ? of the heat radiation layer is 0.7 or more.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: April 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hirohisa Hino, Arata Kishi, Honami Nawa
  • Patent number: 9237686
    Abstract: A wiring board on which an electronic component is to be mounted includes a resist having an opening exposing a joint face which is part of the surface of a wiring layer and to which a terminal of the electronic component is to be joined. In the placing step, the electronic component is placed on the wiring board such that the terminal covers the opening entirely and contacts the solder paste applied onto the joint face. Next, the solder paste applied onto the joint face is heated to melt solder and soften thermosetting resin. This allows the solder to gather in a first space within the opening closed with the wiring layer and the electronic component, while allowing the thermosetting resin to gather in a second space formed between a top side of the resist and a lateral side of the electronic component.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: January 12, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koji Motomura, Arata Kishi, Hiroki Maruo, Yasuhiro Suzuki, Hironori Munakata
  • Publication number: 20150327393
    Abstract: Provided is a heat-dissipating resin composition including: a rubber material having an average emissivity of 80% or higher in a wavelength range from 5 ?m to 20 ?m; and a filler having a grain diameter of 15 ?m or smaller and an aspect ratio of 3 to 10, wherein the heat-dissipating resin composition has an emissivity of 90% or higher in the wavelength range from 5 ?m to 20 ?m.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 12, 2015
    Inventors: Honami NAWA, Hirohisa HINO, Arata KISHI, Naomichi OHASHI, Yasuhiro SUZUKI, Hidenori MIYAKAWA
  • Publication number: 20150180099
    Abstract: A cooling structure can efficiently reduce heat, thereby suppressing temperature elevation in heat-producing electronic apparatuses, without using a heat sink or water-cooling jacket, and which can achieve their downsizing or weight reduction. The cooling structure includes: a heat conduction layer which is formed by coating a first paste on a surface of a heat-producing object; and a heat radiation layer which is formed by coating a second paste on a surface of the heat conduction layer. The heat conduction layer includes a first resin and a first filler, and a heat conductivity A of the heat conduction layer is 1.0 W/(m·K) or more. The heat radiation layer includes a second resin and a second filler, and an infrared emissivity ? of the heat radiation layer is 0.7 or more.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 25, 2015
    Inventors: HIROHISA HINO, ARATA KISHI, HONAMI NAWA